S75WS256NDFBAWMB datasheet(50/216 Pages) SPANSION

50 / 216 page

S75WS256Nxx Based MCPs

S75WS-N-00_A0 February 17, 2005

Ad van c e

Inf o rmation

may choose to perform other system tasks. In this case, the system must start at the beginning

of the algorithm when it returns to determine the status of the operation. Refer to Figure 8.6 for

more details.

DQ5: Exceeded Timing Limits.

DQ5 indicates whether the program or erase time has exceeded

a specified internal pulse count limit. Under these conditions DQ5 produces a 1, indicating that

the program or erase cycle was not successfully completed. The device may output a 1 on DQ5 if

the system tries to program a 1 to a location that was previously programmed to 0 Only an erase

operation can change a 0 back to a 1. Under this condition, the device halts the operation, and

when the timing limit has been exceeded, DQ5 produces a 1. Under both these conditions, the

system must write the reset command to return to the read mode (or to the erase-suspend-read

mode if a bank was previously in the erase-suspend-program mode).

DQ3: Sector Erase Timeout State Indicator.

After writing a sector erase command sequence,

the system may read DQ3 to determine whether or not erasure has begun. (The sector erase

timer does not apply to the chip erase command.) If additional sectors are selected for erasure,

the entire time-out also applies after each additional sector erase command. When the time-out

period is complete, DQ3 switches from a 0 to a 1. If the time between additional sector erase

commands from the system can be assumed to be less than tSEA, the system need not monitor

DQ3. See Sector Erase Command Sequence for more details.

After the sector erase command is written, the system should read the status of DQ7 (Data# Poll-

ing) or DQ6 (Toggle Bit I) to ensure that the device has accepted the command sequence, and

then read DQ3. If DQ3 is 1, the Embedded Erase algorithm has begun; all further commands (ex-

cept Erase Suspend) are ignored until the erase operation is complete. If DQ3 is 0 the device

accepts additional sector erase commands. To ensure the command has been accepted, the sys-

tem software should check the status of DQ3 prior to and following each sub-sequent sector erase

command. If DQ3 is high on the second status check, the last command might not have been

accepted. Table 8.23 shows the status of DQ3 relative to the other status bits.

DQ1: Write to Buffer Abort.

DQ1 indicates whether a Write to Buffer operation was aborted.

Under these conditions DQ1 produces a 1. The system must issue the Write to Buffer Abort Reset

command sequence to return the device to reading array data. See Write Buffer Programming

Operation for more details.

Table 8.23 Write Operation Status

Notes:

1. DQ5 switches to 1 when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. Refer to the

section on DQ5 for more information.

2. DQ7 a valid address when reading status information. Refer to the appropriate subsection for further details.

3. Data are invalid for addresses in a Program Suspended sector.

4. DQ1 indicates the Write to Buffer ABORT status during Write Buffer Programming operations.

5. The data-bar polling algorithm should be used for Write Buffer Programming operations. Note that DQ7# during Write Buffer Programming

indicates the data-bar for DQ7 data for the Last Loaded Write-buffer Address location.

Program

Suspend

Mode

(Note 3)

Reading within Program Suspended Sector

INVALID

(Not

Allowed)

INVALID

(Not

Allowed)

INVALID

(Not

Allowed)

INVALID

(Not

Allowed)

INVALID

(Not

Allowed)

INVALID

(Not

Allowed)

Reading within Non-Program Suspended

Sector

Data

Write to

Buffer

(Note 5)

BUSY State

DQ7#

Toggle

N/A

Exceeded Timing Limits

DQ7#

Toggle

N/A

ABORT State

DQ7#

Toggle

N/A

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