S75WS256NDFBAWMB datasheet(41/216 Pages) SPANSION

41 / 216 page

February 17, 2005 S75WS-N-00_A0

S75WS256Nxx Based MCPs

Advance

Information

Notes:

1. See Table 13.1 for erase command sequence.

2. See the section on DQ3 for information on the sector erase timeout.

Figure 8.5 Sector Erase Operation

Write Unlock Cycles:

Address 555h, Data AAh

Address 2AAh, Data 55h

Write Sector Erase Cycles:

Address 555h, Data 80h

Address 555h, Data AAh

Address 2AAh, Data 55h

Sector Address, Data 30h

Write Additional

Sector Addresses

FAIL. Write reset command

to return to reading array.

PASS. Device returns

to reading array.

Wait 4

µs

Perform Write Operation

Status Algorithm

Select

Additional

Sectors?

Unlock Cycle 1

Unlock Cycle 2

Yes

Last Sector

Selected?

Done?

DQ5 = 1?

Command Cycle 1

Command Cycle 2

Command Cycle 3

Specify first sector for erasure

Error condition (Exceeded Timing Limits)

Status may be obtained by reading DQ7, DQ6 and/or DQ2.

Poll DQ3.

DQ3 = 1?

• Each additional cycle must be written within tSEA timeout

• Timeout resets after each additional cycle is written

• The host system may monitor DQ3 or wait tSEA to ensure

acceptance of erase commands

• No limit on number of sectors

• Commands other than Erase Suspend or selecting

additional sectors for erasure during timeout reset device

to reading array data

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