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CYT4DNJBJS bảng dữ liệu(PDF) 197 Page - Infineon Technologies AG

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Giải thích chi tiết về linh kiện  TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual
PDF  209 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
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Datasheet
197
002-24601 Rev. *I
2023-02-14
TRAVEO™ T2G 32-bit Automotive MCU
Based on Arm® Cortex®-M7 dual
Errata
4. SWRESET register field of VIDEOSS0_TCONx_SWRESET violates the spec
Problem Definition
1. Some devices might have wrong reset values upon reset.
2. The SWRESET field read as zero indicates TCON registers being at reset state. However,
according to the spec, a value of one being read on SWRESET field should indicate the reset state.
3. When TCON enters reset, not all registers are reset.
Parameters Affected
N/A
Trigger Condition(s)
On system reset and while writing to the SWRESET register.
Scope of Impact
No impact since the register is not used by the software for debug and not used in customer
applications
Workaround
Write only zero to the SWRESET register field to not trigger the reset active state. This register
should not be used at all since other register fields of this register are for miniLVDS and this
feature is not supported.
Fix Status
No silicon fix planned. Use workaround.
5. Crypto ECC errors may be set after boot with application authentication
Problem Definition
Due to the improper initialization of the Crypto memory buffer, Crypto ECC errors may be set
after boot with application authentication.
Parameters Affected
N/A
Trigger Condition(s)
Boot device with application authentication.
Scope of Impact
Crypto ECC errors may be set after boot with application authentication.
Workaround
Clear or ignore Crypto ECC errors which generated during boot with application authentication.
Fix Status
No silicon fix planned. TRM (002-25800) will be updated.
6. Incomplete erase of Code Flash cells could happen Erase Suspend / Erase Resume is used along with Erase Sector operation
in Non-Blocking mode
Problem Definition
Code Flash memory can be erased in “Non-Blocking” mode; a Non-Blocking mode supported option allows
users to suspend an ongoing erase sector operation. When an ongoing erase operation is interrupted using
“Erase Suspend” and “Erase Resume”, Flash cells may not have been erased completely, even after the
erase operation complete is indicated by FLASHC_STATUS register. Only Code Flash is impacted by this
issue, Work Flash and Supervisory Flash (SFlash) are not impacted.
Parameters Affected
N/A
Trigger Condition(s)
Using EraseSector System Call in Non-Blocking mode for CM0+ to erase Code Flash and the ongoing erase
operation is interrupted using EraseSuspend and EraseResume System calls.
Scope of Impact
When Code Flash sectors are erased in Non-Blocking mode and the ongoing erase operation is interrupted
by Erase Suspend / Erase Resume, it cannot be guaranteed that the Code Flash cells are fully erased. Any
read on the Code Flash area after the erase is complete or read on the programmed data after ProgramRow
is complete can trigger ECC errors.
Workaround
Use any of the following:
1) Use Non-Blocking mode for EraseSector, but do not interrupt the erase operation using Erase Suspend
/ Erase Resume.
2) If a Code Flash sector erase operation is interrupted using Erase Suspend / Erase Resume, then erase the
same sector again without Erase Suspend / Erase Resume before reading the sector or programming the
sector.



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