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MPC821 bảng dữ liệu(PDF) 214 Page - NXP Semiconductors |
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MPC821 bảng dữ liệu(HTML) 214 Page - NXP Semiconductors |
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214 / 242 page ![]() Support Information 38 MPC860TFADS Daughter Board Design Specification—Rev 0.1 MOTOROLA PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE 47 N.C. 48 GND 49 50 PB27 I/O, X MPC PI/O port B 27. Appears also at P8 but otherwise unused. 51 PB28 I/O, X MPC PI/O port B 28. Appears also at P8 but otherwise unused. 52 GND 53 PC12 I/O, X MPC PI/O port C 12. Appears also at P8 but otherwise unused. 54 PB26 I/O, X MPC PI/O port C 26. Appears also at P8 but otherwise unused. 55 GND 56 57 PA5 I/O, X MPC PI/O port A 5. Appears also at P8 but otherwise unused. 58 GND 59 60 PA4 I/O, X MPC PI/O port A 4. Appears also at P8 but otherwise unused. 61 E_CLSN I/O, H Ethernet Port Collision indication signal. Connected to the SCC’s CTS~ signal. When the ethernet port is disabled via BCSR1, may be used off-board for any alternate function. 62 E_RENA I/O, H Ethernet Receive Enable. Connected to the SCC’s CD~ signal. Active when there is network activity. When the ethernet port is disabled via BCSR1, may be used off-board for any alternate function. 63 SPARE2 I/O, X MPC spare line 2. Pulled - up but otherwise unused on the FADS. 64 VDOEN~ O, L Applies only for MPC823 daughter board. Video Encoder Enable Indication. Generated by BCSR4. Not USED IN THE 860TDB 65 GND 66 67 SYSCLK I, X System Clock. In fact the CLKOUT of the MPC. 68 GND 69 70 71 PA3 I/O, X MPC PI/O port A 3. Appears also at P8 but otherwise unused. 72 GND 73 74 PA2 I/O, X MPC PI/O port A 2. Appears also at P8 but otherwise unused. 75 PB17 I/O, X MPC PI/O port B 17. Appears also at P8 but otherwise unused. TABLE 5-11. PM3 Interconnect Signals Pin No. Signal Name Attribute Description Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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