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MPC821 bảng dữ liệu(PDF) 212 Page - NXP Semiconductors

tên linh kiện MPC821
Giải thích chi tiết về linh kiện  Design Specification
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Support Information
36
MPC860TFADS Daughter Board Design Specification—Rev 0.1
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
TABLE 5-11. PM3 Interconnect Signals
Pin No.
Signal Name
Attribute
Description
1
ETHRX
O, X
Ethernet port Receive Data. When the ethernet port is disabled
via BCSR1 - tri-stated. Appears also at P8.
2
GND
3
4
UUFEN~
O, L
When this signal is active (LOW) it enable the LXT970 device.
This signal connected to the TRSTE signal of the LXT970.
In DTE mode when this pin is high the LXT970 isolate it self from
the MII data interface. In repeater mode when it is high the
LXT970 tree state the MII output pins.
5
ETHTX
I, X
Ethernet Port Transmit Data. Appears also at P8.
6
GND
7
8
PC9
X, X
MPC’s PI/O C 9 pin. Appears also at P8 but otherwise unused on
the FADS.
9
IRDRXD
O, X
InfraRed Port Receive Data. When the I/R port is disabled via
BCSR1 - tri-stated. Appears also at P8.
10
GND
11
IRDTXD
I, X
InfraRed Port Transmit Data. Appears also at P8.
12
GND
13
14
PC8
I/O, X
MPC PI/O port C 8. Appears also at P8 but otherwise unused.
15
PA11
I/O, X
MPC PI/O port A 11. Appears also at P8 but otherwise unused.
16
GND
17
PA10
I/O, X
MPC PI/O port A 10. Appears also at P8 but otherwise unused.
18
GND
19
20
PC7
I/O, X
MPC PI/O port C 7. Appears also at P8 but otherwise unused.
21
PA9
I/O, X
MPC PI/O port A 9. Appears also at P8 but otherwise unused.
22
GND
23
PA8
I/O, X
MPC PI/O port A 9. Appears also at P8 but otherwise unused.
24
GND
25
26
PC13
I/O, X
MPC PI/O port C 13. Appears also at P8 but otherwise unused.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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