MPC821 datasheet(9/242 Pages) NXP

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Hardware Preparation and Installation

MPC8XXFADS Design Specification—Rev 0.1

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

2•3•1

ADI Port Address Selection

The MPC8XXFADS can have eight possible slave addresses set for its ADI port, enabling up to eight

MPC8XXFADS boards to be connected to the same ADI board in the host computer. The selection

of the slave address is done by setting switches 1, 2 & 3 in the Dip-Switch - DS2. Switch 1 stands for

the most-significant bit of the address and switch 3 stands for the least-significant bit. If the switch is

in the ’ON’ state, it stands for logical ’1’. In FIGURE 2-2 DS1 is shown to be configured to address ’0’.

FIGURE 2-2 Configuration Dip-Switch - DS2

Table 2-1 describes the switch settings for each slave address:

2•3•2

Clock Source Selection

Switch #4 on DS2 selects the clock source for the MPC. When it is in the ’ON’ position while the FADS

is powered-up, the on-board 32.768 KHz crystal resonatorA becomes the clock source and the PLL

multiplication factor becomes 1:513. When switch #4 is in the ’OFF’ position while the FADS is

powered-up, the on-board 4BMHz clock generatorA becomes the clock source while the PLL

multiplication factor becomes 1:5.

2•3•3

Power-On Reset Source Selection

As there are differences between MPC revisions regarding the functionality of the Power-On Reset

logic, it is therefore necessary to select different sources for Power-ON reset generation.

The above selection is done on the Daughter Board and therefore, documented in the specific

A. Located on the Daughter-Board

B. A 5MHz clock generator is packed as well.

Table 2-1 ADI Address Selection

ADDRESS

Switch 1

Switch 2

Switch 3

OFF

ONONON

DS2

ADR2

ADR1

ADR0

ADR2

ADR1

ADR0

32.678 KHz Crystal Resonator

3 - 5 MHz Generator via EXTCLK

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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