MPC821 datasheet(60/242 Pages) NXP

60 / 242 page

Functional Description

MPC8XXFADS Design Specification—Rev 0.1

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

FIGURE 4-7 Debug Port Controller Block Diagram

To allow for an external debug port controller to be incorporated with the FADS and to allow target

system debug by the FADS, a standard 10 pin, debug port connector is provided and the local debug

port controller may be disabledA by removing the ADI bundle from the its connector.

When the ADI’s 37 lead cable is disconnected from either the ADI connector or from the FADS’s 37

pin connector, the debug port controller is disabled allowing either the connection of an external

debug port controller, or independent s/w run, i.e., the MPC boots from the flash memory to run user’s

application without debug port controller intervention. This feature becomes especially handy regard-

ing demo’s.

In this state, VFLS(0:1) or FRZB signals are routed to the debug port connector, so that, the external

debug port controller has run mode status information.

The ADI I/F supports upto 8 boards connected on the same bundle. Address selection is done by DS2

/ 1,2,3. See 2•3•1 "ADI Port Address Selection" on page 7.

The debug port I/F has two registers: a control / status register and a data register. The control / status

of the Transmit / Receive shift register.

The control / status register is accessed when D_C~ bit is low while the data register is accessed

when D_C~ is driven high by the host via the ADI port.

4•12•1

MPC8XXFADS As Debug Port Controller For Target System

The FADS may be used as a debug port controller for a target system, provided that the target system

A. I.e., debug port controller outputs are tri-stated, allowing debug port to be driven by an external debug-tool.

B. Depended on H/W settings.

ADI - Handshake Logic

DSDI

DSCK

DSDO

HRESET*

SRESET*

VFLS0

VFLS1

& Port Control

Parallel <--> Serial

Converter

ADI Address

Selection

Daughter Board Connector

ADI Port Connector

Control / Status Register

Data Register

Debug Port Conn.

FRZ

CHINS*

’1’

’0’

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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