CS48L32 datasheet(4/192 Pages) CIRRUS

4 / 192 page

Cirrus Logic

DS1219F4

CS48L32

1.2 QFN Pinout

Figure 1-2. Top-Down (Through-Package) View—64-pad QFN Package

1.3 Pin Descriptions

Table 1-1 describes each pin on the CS48L32. Note that pins that share a common name should be tied together on the

printed circuit board (PCB).

Table 1-1. Pin Descriptions

PU = Pull-up, PD = Pull-down, K = Bus keeper, H = Hysteresis on CMOS input, Z = Hi-Z (High impedance), C = CMOS, OD = Open drain.

Pin Name

Pin #

(WLCSP)

Pin #

(QFN)

Power

Supply

I/O

Pin Description

Digital Pad

Attributes

State at Reset

Analog I/O

CP_FILT

—

Charge Pump output decoupling pin

—

Output

CP_FLYN

—

Charge Pump fly-back capacitor pin

—

CP_FLYP

—

Charge Pump fly-back capacitor pin

—

IN1LN_1/IN1_

PDMCLK

VOUT_MIC or

MICBIAS1 [1]

I/O

Left-channel negative differential mic/line input/

IN1 PDM clock.

IN1LN_1 input

IN1LN_2

VOUT_MIC

Left-channel negative differential mic/line input.

—

Input

IN1LP_1/IN1_

PDMDATA

VOUT_MIC or

MICBIAS1 [1]

Left-channel single-ended mic/line input/positive

differential mic/line input/IN1 PDM data input.

PD/H

IN1LP_1 input

IN1LP_2

VOUT_MIC

Left-channel single-ended mic/line input/positive

differential mic/line input.

—

Input

CS48L32 bảng dữ liệu(PDF) 4 Page - Cirrus Logic

CS48L32 bảng dữ liệu(HTML) 4 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL