công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

AD9083BBCZ bảng dữ liệu(PDF) 79 Page - Analog Devices

tên linh kiện AD9083BBCZ
Giải thích chi tiết về linh kiện  16-Channel, 125 MHz Bandwidth, JESD204B Analog-to-Digital Converter
PDF  93 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

AD9083BBCZ bảng dữ liệu(HTML) 79 Page - Analog Devices

Back Button AD9083BBCZ Datasheet HTML 75Page - Analog Devices AD9083BBCZ Datasheet HTML 76Page - Analog Devices AD9083BBCZ Datasheet HTML 77Page - Analog Devices AD9083BBCZ Datasheet HTML 78Page - Analog Devices AD9083BBCZ Datasheet HTML 79Page - Analog Devices AD9083BBCZ Datasheet HTML 80Page - Analog Devices AD9083BBCZ Datasheet HTML 81Page - Analog Devices AD9083BBCZ Datasheet HTML 82Page - Analog Devices AD9083BBCZ Datasheet HTML 83Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 79 / 93 page
background image
Data Sheet
AD9083
Rev. 0 | Page 79 of 93
Addr.
Name
Bits
Bit Name
Description
Reset Access
0x301 PLL_STATUS
7
JTX_PLL_LOCKED
PLL Locked Status Bit.
0x0
R
[6:0]
RESERVED
Reserved.
0x0
R
0x309 SYSREF_DELAY_REG
7
SYSREF_PULSE_DELAY_
ENABLE
Force link reset from Regmap.
0x0
R/W
[6:0]
SYSREF_PULSE_DELAY_CYCLES Force link reset from Regmap.
0x0
R/W
0x30A RESET_CTRL_REG
7
FORCE_JTX_PLL_RST_
RELEASE_EN
Enable Force JTX_PLL Reset Release.
0x0
R/W
6
FORCE_JTX_PLL_RST_
RELEASE
Force JTX_PLL reset release.
0x0
R/W
5
RESERVED
Reserved.
0x0
R
4
FORCE_JTX_DIGITAL_RESET_
ON_SYSREF
Enable SYSREF to Force link reset.
0x0
R/W
[3:1]
RESERVED
Reserved.
0x0
R
0
FORCE_JTX_DIGITAL_RESET_
ON_RSTEN_FORCE_EN
Enable Early Detection of SYSREF to Force link reset. 0x0
R/W
0x30B SER_PARITY_RESET_EN1 [7:0]
SER_PARITY_RESET_EN
parity reset enable.
0x0
R/W
0x30C LCM_DIV_FORCE_EN
[7:1]
RESERVED
Reserved.
0x0
R
0
LCM_DIV_FORCE_EN
LCM Divider Value Force Enable.
0x0
R/W
0x30D LCM_DIV1
[7:0]
LCM_DIV[7:0]
LCM Divider Value.
0x0
R/W
0x30E LCM_DIV2
[7:0]
LCM_DIV[15:8]
LCM Divider Value.
0x0
R/W
0x30F LMFC_CTL
7
LMFC_OUT_SEL
To select the lmfc or divided lmfc'.
0x0
R/W
[6:5]
RESERVED
Reserved.
0x0
R
4
LMFC_DIV_EDGE
which edge of LMFC. which edge of LMFC is used
for division before sending out of GPIO. 0for
posedge
0x0
R/W
3
RESERVED
Reserved.
0x0
R
[2:0]
LMFC_OUT_DIV
Divider value before passing LMFC out of GPIO.
0x0
R/W
0x310 FORCE_LINK_RESET_REG [7:5]
RESERVED
Reserved.
0x0
R
4
FORCE_LINK_DIGITAL_RESET Force link reset from Regmap.
0x0
R/W
[3:1]
RESERVED
Reserved.
0x0
R
0
FORCE_LINK_RESET
Force link reset from Regmap.
0x1
R/W
0x313 PHASE_ESTABLISH_
STATUS
[7:1]
RESERVED
Reserved.
0x0
R
0
JTX_PHASE_ESTABLISHED
phase established readback.
0x0
R
0x315 CLKGEN_ALIGN_FALL_R
ST_DEASSERT
[7:1]
RESERVED
Reserved.
0x0
R
0
CLKGEN_ALIGN_FALL_FOR_R
ST_DEASSERT
To use clkgen_align for rst de-assert.
0x0
R/W
0x317 PLL_REF_CLK_DIV1_REG [7:4]
RESERVED
Reserved.
0x0
R
[3:0]
DIVM_JTX_PLL_RC_RX
Selects output division rate;. Selects output
division rate;
0: pd
1: no divider
2: divide by 2
3: divide by 4
0x2
R/W
0x319 PCLK_SYNC_DIV_REG1 [7:0]
PCLK_SYNC_DIV_VAL[7:0]
JESD Synchronous PCLK Divider Value.
0x4
R/W
0x31A PCLK_SYNC_DIV_REG2 [7:1]
RESERVED
Reserved.
0x0
R
0
PCLK_SYNC_DIV_VAL[8]
JESD Synchronous PCLK Divider Value.
0x0
R/W
0x31B PCLK_ASYNC_DIV_REG1 [7:0]
PCLK_ASYNC_DIV_VAL[7:0]
JESD Asynchronous PCLK Divider Value.
0x4
R/W
0x31C PCLK_ASYNC_DIV_REG2 [7:1]
RESERVED
Reserved.
0x0
R
0
PCLK_ASYNC_DIV_VAL[8]
JESD Asynchronous PCLK Divider Value.
0x0
R/W
0x31D CONV_CLK_DIV_REG1
[7:0]
CONV_CLK_DIV_VAL[7:0]
JESD Conv Clock Divider Value.
0x4
R/W
0x31E CONV_CLK_DIV_REG2
[7:2]
RESERVED
Reserved.
0x0
R
[1:0]
CONV_CLK_DIV_VAL[9:8]
JESD Conv Clock Divider Value.
0x0
R/W



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com