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AD9083BBCZ bảng dữ liệu(PDF) 29 Page - Analog Devices |
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AD9083BBCZ bảng dữ liệu(HTML) 29 Page - Analog Devices |
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29 / 93 page ![]() Data Sheet AD9083 Rev. 0 | Page 29 of 93 LOW-PASS, CTSD ADC OVERVIEW The AD9083 uses a voltage control oscillator (VCO)-based CTSD modulator ADC to convert the analog input to a digital word. The digital word can then be processed by a digital backend that provides decimation filtering, rate adjustment, DDC frequency shifting, and FIR filtering. The ADC samples at a rate (fS) between 1 GSPS and 2 GSPS. The typical maximum oversampling ratio (OSR) is 8 for a usable bandwidth up to fS/16. LOW-PASS Σ-Δ ADC Figure 56 shows a simplified, single-ended representation of the low power Σ-Δ ADC modulator. The ADC is a first-order, single- stage modulator. The NTF is first order. Therefore, a relatively high OSR is required to reduce noise in the signal band of interest. For a more detailed description of the modulator, see IEEE JSSC 2010 and IEEE JSSC 2013. 16 15 NON- LINEARITY CORRECTION – 8 8 5 5 15 NON- LINEARITY CORRECTION OVER- RANGE CORR OVER- RANGE CORR PHASE DECODER PHASE DECODER RING SAMPLER SIGNAL CONVERTER 10x3 – ELEMENT ICRO 10x3 – ELEMENT ICRO fS CALIBRATION UNIT RING SAMPLER 1–z–1 1–z–1 V/I v(t) Figure 56. Simplified, Single-Ended, Low Power, Σ-Δ ADC Modulator |
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