DM505LRBABF datasheet(103/290 Pages) TI1

103 / 290 page

CL=

C C

(C +C )

vssa_osc0

Device

xo_osc0

xi_osc0

Crystal

(Optional)

SPRS91v_CLK_02

103

DM505

www.ti.com

SPRS976D – NOVEMBER 2016 – REVISED JULY 2017

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Specifications

Figure 5-5. Crystal Implementation

NOTE

The load capacitors, Cf1 and Cf2 in Figure 5-5, should be chosen such that the below

equation is satisfied. CL in the equation is the load specified by the crystal manufacturer. All

discrete components used to implement the oscillator circuit should be placed as close as

possible to the associated oscillator xi_osc0, xo_osc0, and vssa_osc0 pins.

Figure 5-6. Load Capacitance Equation

The crystal must be in the fundamental mode of operation and parallel resonant. Table 5-16 summarizes

the required electrical constraints.

Table 5-16. OSC0 Crystal Electrical Characteristics

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Parallel resonance crystal frequency

19.2, 20, 27

MHz

Cf1

Cf1 load capacitance for crystal parallel resonance with Cf1 = Cf2

Cf2

Cf2 load capacitance for crystal parallel resonance with Cf1 = Cf2

ESR(Cf1,Cf2)

Crystal ESR

100

Crystal shunt capacitance

ESR = 30 Ω

ESR = 40 Ω

19.2 MHz, 20 MHz, 27

MHz

ESR = 50 Ω

19.2 MHz, 20 MHz

27 MHz

ESR = 60 Ω

19.2 MHz, 20 MHz

27 MHz

Not Supported

ESR = 80 Ω

19.2 MHz, 20 MHz

27 MHz

Not Supported

ESR = 100 Ω

19.2 MHz, 20 MHz

27 MHz

Not Supported

Crystal motional inductance for fp = 20 MHz

10.16

Crystal motional capacitance

3.42

tj(xiosc0)

Frequency accuracy(1), xi_osc0

Ethernet not used

±200

ppm

Ethernet RGMII using

derived clock

±50

ppm

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