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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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DM505LRBABF bảng dữ liệu(PDF) 89 Page - Texas Instruments |
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DM505LRBABF bảng dữ liệu(HTML) 89 Page - Texas Instruments |
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89 / 290 page  89 DM505 www.ti.com SPRS976D – NOVEMBER 2016 – REVISED JULY 2017 Submit Documentation Feedback Specifications Copyright © 2016–2017, Texas Instruments Incorporated Table 5-5. Maximum Supported Frequency (continued) Module Clock Sources Instance Name Input Clock Name Clock Type Max. Clock Allowed (MHz) PRCM Clock Name PLL / OSC / Source Clock Name PLL / OSC / Source Name TIMER5 TIMER5_ICLK Int 133 IPU_L3_GICLK CORE_X2_CLK DPLL_CORE TIMER5_FCLK Func 100 TIMER5_GFCLK SYS_CLK1 OSC0 FUNC_32K_CLK SYS_32K SYS_CLK2 OSC1 XREF_CLK0 xref_clk0 XREF_CLK1 xref_clk1 CLKOUTMUX0_CL K CLKOUTMUX0_CL K TIMER6 TIMER6_ICLK Int 133 IPU_L3_GICLK CORE_X2_CLK DPLL_CORE TIMER6_FCLK Func 100 TIMER6_GFCLK SYS_CLK1 OSC0 FUNC_32K_CLK OSC0 SYS_CLK2 OSC1 XREF_CLK0 xref_clk0 XREF_CLK1 xref_clk1 CLKOUTMUX0_CL K CLKOUTMUX0_CL K TIMER7 TIMER7_ICLK Int 133 IPU_L3_GICLK CORE_X2_CLK DPLL_CORE TIMER7_FCLK Func 100 TIMER7_GFCLK SYS_CLK1 OSC0 FUNC_32K_CLK OSC0 SYS_CLK2 OSC1 XREF_CLK0 xref_clk0 XREF_CLK1 xref_clk1 CLKOUTMUX0_CL K CLKOUTMUX0_CL K TIMER8 TIMER8_ICLK Int 133 IPU_L3_GICLK CORE_X2_CLK DPLL_CORE TIMER8_FCLK Func 100 TIMER8_GFCLK SYS_CLK1 OSC0 FUNC_32K_CLK OSC0 SYS_CLK2 OSC1 XREF_CLK0 xref_clk0 XREF_CLK1 xref_clk1 CLKOUTMUX0_CL K CLKOUTMUX0_CL K TPCC TPCC_GCLK Int 266 L3MAIN1_L3_GIC LK CORE_X2_CLK DPLL_CORE TPTC1 TPTC0_GCLK Int 266 L3MAIN1_L3_GIC LK CORE_X2_CLK DPLL_CORE TPTC2 TPTC1_GCLK Int 266 L3MAIN1_L3_GIC LK CORE_X2_CLK DPLL_CORE UART1 UART1_FCLK Func 48 UART1_GFCLK FUNC_192M_CLK DPLL_PER UART1_ICLK Int 133 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE UART2 UART2_FCLK Func 48 UART2_GFCLK FUNC_192M_CLK DPLL_PER UART2_ICLK Int 133 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE UART3 UART3_FCLK Func 48 UART3_GFCLK FUNC_192M_CLK DPLL_PER UART3_ICLK Int 133 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE VIP1 L3_CLK_PROC_C LK Int & Func 266 VIP1_GCLK CORE_X2_CLK DPLL_CORE CORE_ISS_MAIN_ CLK DPLL_CORE |
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