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MPC5744P bảng dữ liệu(PDF) 47 Page - Freescale Semiconductor, Inc |
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MPC5744P bảng dữ liệu(HTML) 47 Page - Freescale Semiconductor, Inc |
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47 / 114 page ![]() Pinouts MPC5744P Data Sheet, Rev. 0.3 Preliminary—Subject to Change Without Notice Freescale Semiconductor 47 J[7] MSCR[151] 0000 (Default) GPI[151]3 ADC2_ADC3_A N[2] SIUL2-GPI[151] General Purpose Input J[7] I 66 P10 0001 - Reserved - - 0010-1111 - Reserved - - J[8] MSCR[152] 0000 (Default) GPIO[152] SIUL2-GPIO[152] General Purpose IO J[8] I/O 95 119 G16 0001 ETC4 eTimer_2 eTimer_2 Input/Output Data Channel 4 I/O 0010 ETC2 eTimer_2 eTimer_2 Input/Output Data Channel 2 - 0011-1111 - Reserved - - IMCR[34] 0011 RXD CAN2 CAN 2 Receive Pin I J[9] MSCR[153] 0000 (Default) GPIO[153] SIUL2-GPIO[153] General Purpose IO J[9] I/O 16 20 K1 0001 ETC5 eTimer_2 eTimer_2 Input/Output Data Channel 5 I/O 0010 NEX_RDY_B NPC Nexus data ready for transfer (RDY_B) O 0011-1111 - Reserved - - IMCR[39] 0010 EXT_IN CTU_1 CTU_1 External Trigger Input I NOTES: 1 (Default) = ALT mode configuration after reset. 2 Changing B[5] configuration during debug might impact availability of TDI. 3 ADC analog input. Program corresponding MSCR APC bit and enable ADC to switch-on analog input path. See Table 13 for details. 4 Shared with SIPI LFAST transmit pad SIPI_TXP. Alternative modes and GPIO must be disabled (OBE=0, IBE=0) if port is used for SIPI LFAST. 5 Sine Wave Generator (SWG) output if SWG is enabled. See Table 13 for details. 6 Shared with SIPI LFAST receive pad SIPI_RXP. Alternative modes and GPIO must be disabled (OBE=0, IBE=0) if port is used for SIPI LFAST. 7 Shared with SIPI LFAST transmit pad SIPI_TXN. Alternative modes and GPIO must be disabled (OBE=0, IBE=0) if port is used for SIPI LFAST. 8 Shared with SIPI LFAST receive pad SIPI_RXN. Alternative modes and GPIO must be disabled (OBE=0, IBE=0) if port is used for SIPI LFAST. Table 7. Pin Muxing (continued) Port Pin SIUL2 MSCR/ IMCR Number MSCR/ IMCR SSS Value Signal Module Short Signal Description Dir |
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