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MC9S08DZ96F2CLL bảng dữ liệu(PDF) 283 Page - Freescale Semiconductor, Inc

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MC9S08DZ96F2CLL bảng dữ liệu(HTML) 283 Page - Freescale Semiconductor, Inc

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Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
283
12.4.5
Transmit Buffer Priority Register (TBPR)
This register defines the local priority of the associated message transmit buffer. The local priority is used
for the internal prioritization process of the MSCAN and is defined to be highest for the smallest binary
number. The MSCAN implements the following internal prioritization mechanisms:
•
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
•
The transmission buffer with the lowest local priority field wins the prioritization.
In cases of more than one buffer having the same lowest priority, the message buffer with the lower index
number wins.
Read: Anytime when TXEx flag is set (see Section 12.3.6, “MSCAN Transmitter Flag Register
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see Section 12.3.10,
“MSCAN Transmit Buffer Selection Register (CANTBSEL)”).
Write: Anytime when TXEx flag is set (see Section 12.3.6, “MSCAN Transmitter Flag Register
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see Section 12.3.10,
“MSCAN Transmit Buffer Selection Register (CANTBSEL)”).
12.4.6
Time Stamp Register (TSRH–TSRL)
If the TIME bit is enabled, the MSCAN will write a time stamp to the respective registers in the active
transmit or receive buffer as soon as a message has been acknowledged on the CAN bus (see
Table 12-33. Data Length Codes
Data Length Code
Data Byte
Count
DLC3
DLC2
DLC1
DLC0
0000
0
0001
1
0010
2
0011
3
0100
4
0101
5
0110
6
0111
7
1000
8
76543210
R
PRIO7
PRIO6
PRIO5
PRIO4
PRIO3
PRIO2
PRIO1
PRIO0
W
Reset:
00000000
Figure 12-35. Transmit Buffer Priority Register (TBPR)



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