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MC9S08DZ96F2CLL bảng dữ liệu(PDF) 233 Page - Freescale Semiconductor, Inc

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MC9S08DZ96F2CLL bảng dữ liệu(HTML) 233 Page - Freescale Semiconductor, Inc

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MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
233
Chapter 11
Inter-Integrated Circuit (S08IICV2)
11.1
Introduction
The inter-integrated circuit (IIC) provides a method of communication between a number of devices. The
interface is designed to operate up to 100 kbps with maximum bus loading and timing. The device is
capable of operating at higher baud rates, up to a maximum of clock/20, with reduced bus loading. The
maximum communication length and the number of devices that can be connected are limited by a
maximum bus capacitance of 400 pF.
All MC9S08DZ128 Series MCUs in the 100-pin package have two IICs; devices in the 64-pin and 48-pin
packages have one IIC.
NOTE
MC9S08DZ128 Series devices operate at a higher voltage range (2.7 V to
5.5 V) and do not include stop1 mode. Please ignore references to stop1.
11.1.1
IIC1 Configuration Information
The IIC1 module pins, SDA1 and SCL1 can be repositioned under software control using IIC1PS in
SOPT1 as shown in Table 11-1. IIC1PS in SOPT1 selects which general-purpose I/O ports are associated
with the IIC1 operation.
Table 11-1. IIC1 Position Options
IIC1PS in SOPT1
Port Pin for SCL1
Port Pin for SDA1
0 (default)
PTF2
PTF3
1
PTE4
PTE5



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