MC9S08DZ96F2CLL datasheet(201/458 Pages) FREESCALE

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Chapter 9 Analog Comparator (S08ACMPV3)

MC9S08DZ128 Series Data Sheet, Rev. 1

Freescale Semiconductor

201

9.1.2

Features

The ACMP has the following features:

•

Full rail to rail supply operation.

•

Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator

output.

•

Option to compare to ﬁxed internal bandgap reference voltage.

•

Option to allow comparator output to be visible on a pin, ACMPxO.

•

Can operate in stop3 mode

9.1.3

Modes of Operation

This section deﬁnes the ACMP operation in wait, stop and background debug modes.

9.1.3.1

ACMP in Wait Mode

The ACMP continues to run in wait mode if enabled before executing the WAIT instruction. Therefore,

the ACMP can be used to bring the MCU out of wait mode if the ACMP interrupt, ACIE is enabled. For

lowest possible current consumption, the ACMP should be disabled by software if not required as an

interrupt source during wait mode.

9.1.3.2

ACMP in Stop Modes

9.1.3.2.1

Stop3 Mode Operation

The ACMP continues to operate in Stop3 mode if enabled and compare operation remains active. If

ACOPE is enabled, comparator output operates as in the normal operating mode and comparator output is

placed onto the external pin. The MCU is brought out of stop when a compare event occurs and ACIE is

enabled; ACF ﬂag sets accordingly.

If stop is exited with a reset, the ACMP will be put into its reset state.

9.1.3.2.2

Stop2 and Stop1 Mode Operation

During either Stop2 and Stop1 mode, the ACMP module will be fully powered down. Upon wake-up from

Stop2 or Stop1 mode, the ACMP module will be in the reset state.

9.1.3.3

ACMP in Active Background Mode

When the microcontroller is in active background mode, the ACMP will continue to operate normally.

9.1.4

Block Diagram

The block diagram for the Analog Comparator module is shown Figure 9-2.

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