AT90SCR100 datasheet(378/433 Pages) ATMEL

378 / 433 page

378

TPR0327AY–SMS–30Jan09

AT90SCR100

Notes: 1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.

Table 29-2.

Lock Bit Protection Modes(1)

Memory Lock Bits

Protection Type

LB Mode

LB2

LB1

No memory lock features enabled.

Further programming of the Flash and EEPROM is disabled in

Serial Programming mode. The Fuse bits are locked in Serial

Programming mode.

Further programming and verification of the Flash and EEPROM

is disabled in Serial Programming mode. The Boot Lock bits and

Fuse bits are locked in both Serial Programming mode.

BLB0 Mode

BLB02

BLB01

No restrictions for SPM or (E)LPM accessing the Application

section.

SPM is not allowed to write to the Application section.

SPM is not allowed to write to the Application section, and

(E)LPM executing from the Boot Loader section is not allowed to

read from the Application section. If Interrupt Vectors are placed

in the Boot Loader section, interrupts are disabled while

executing from the Application section.

(E)LPM executing from the Boot Loader section is not allowed to

read from the Application section. If Interrupt Vectors are placed

in the Boot Loader section, interrupts are disabled while

executing from the Application section.

BLB1 Mode

BLB12

BLB11

No restrictions for SPM or (E)LPM accessing the Boot Loader

section.

SPM is not allowed to write to the Boot Loader section.

SPM is not allowed to write to the Boot Loader section, and

(E)LPM executing from the Application section is not allowed to

read from the Boot Loader section. If Interrupt Vectors are

placed in the Application section, interrupts are disabled while

executing from the Boot Loader section.

(E)LPM executing from the Application section is not allowed to

read from the Boot Loader section. If Interrupt Vectors are

placed in the Application section, interrupts are disabled while

executing from the Boot Loader section.

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