AT90SCR100 datasheet(208/433 Pages) ATMEL

208 / 433 page

208

TPR0327AY–SMS–30Jan09

AT90SCR100

Figure 17-3.

USB Smart Card Interface Block Diagram

• First, Pipe 0 to Pipe 3 are configured, in the growing order. The memory of each is reserved

in the DPRAM.

• Then, the Pipe 1 is disabled (EPEN=0), but its memory reservation is internally kept by the

controller.

• Its ALLOC bit is cleared: the Pipe 2 “slides” down, but the Pipe 3 does not “slide”.

• Finally, if the firmware chooses to reconfigure the Pipe 1 with a bigger size. The controller

reserved the memory after the Pipe 0 memory and automatically “slide” the Pipe 2. The Pipe

3 does not move and a memory conflict appears, in that both Pipe 2 and 3 use a common

area. The data of those pipes are potentially lost.

17.5

USB Host Controller Description

17.5.1

Pipe description

For the USB Host controller, the term of Pipe is used instead of Endpoint for the USB Device

controller. A Host Pipe corresponds to a Device Endpoint, as described in the USB specification:

Free

Pipe

Activation

PEN=1

ALLOC=1

Pipe

Activation

Pipe

Disable

Free its memory

(ALLOC=0)

PEN=0

(ALLOC=1)

LOST MEMORY

Free

1 (bigger size)

Free

Conflict

• The data of Pipe/Endpoint 0 are never lost whatever the activation or

deactivation of the higher Pipe. Its data is lost if it is deactivated.

• Deactivate and reactivate the same Pipe with the same parameters does not

lead to a “slide” of the higher endpoints. For those endpoints, the data are

preserved.

• CFGOK is set by hardware even in the case that there is a “conflict” in the

memory allocation.

Note

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