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AT90SCR100 bảng dữ liệu(PDF) 129 Page - ATMEL Corporation |
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AT90SCR100 bảng dữ liệu(HTML) 129 Page - ATMEL Corporation |
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129 / 433 page ![]() 129 TPR0327AY–SMS–30Jan09 AT90SCR100 When a capture is triggered according to the ICESn setting, the counter value is copied into the Input Capture Register (ICR1). The event will also set the Input Capture Flag (ICF1), and this can be used to cause an Input Capture Interrupt, if this interrupt is enabled. When the ICR1 is used as TOP value (see description of the WGM13:0 bits located in the TCCR1A and the TCCR1B Register), the ICP1 is disconnected and consequently the Input Cap- ture function is disabled. • Bit 5 – Reserved Bit This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be written to zero when TCCR1B is written. • Bit 4..3 – WGM13..2: Waveform Generation Mode See TCCR1A Register description. • Bit 2..0 – CS12..0: Clock Select The three Clock Select bits select the clock source to be used by the Timer/Counter, see Figure 13-21 and Figure 13-22. If external pin modes are used for the Timer/Countern, transitions on the Tn pin will clock the counter even if the pin is configured as an output. This feature allows software control of the counting. 13.2.10.3 TCCR1C – Timer/Counter1 Control Register C • Bit 7 – FOC1A: Force Output Compare for Channel A • Bit 6 – FOC1B: Force Output Compare for Channel B The FOC1A/FOC1B bits are only active when the WGM13:0 bits specifies a non-PWM mode. However, for ensuring compatibility with future devices, these bits must be set to zero when TCCR1A is written when operating in a PWM mode. When writing a logical one to the FOC1A/FOC1B bit, an immediate compare match is forced on the Waveform Generation unit. Table 13-15. Clock Select Bit Description CS12 CS11 CS10 Description 0 0 0 No clock source (Timer/Counter stopped). 00 1 clkI/O/1 (No prescaling) 01 0 clkI/O/8 (From prescaler) 01 1 clkI/O/64 (From prescaler) 10 0 clkI/O/256 (From prescaler) 10 1 clkI/O/1024 (From prescaler) 1 1 0 External clock source on Tn pin. Clock on falling edge. 1 1 1 External clock source on Tn pin. Clock on rising edge. Bit 7654 3 2 1 0 $000082 FOC1A FOC1B - - - - - - TCCR1C Read/write R/W R/W R R R R R R Initial value 0000 0 0 0 0 0x00 |
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