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S32K310 bảng dữ liệu(PDF) 110 Page - NXP Semiconductors

tên linh kiện S32K310
Giải thích chi tiết về linh kiện  Supports S32K344, S32K324, S32K314, S32K312, S32K311, S32K310, S32K341, S32K342, S32K322, S32K328, S32K338, S32K348, S32K356, S32K358, S32K388 and S32K389. Data is preliminary for S32K312 and S32K344 100LQFP only.
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Figure 54. MII transmit diagram
12.8.2 Ethernet MII (200 Mbps)
The following timing specs are defined at the device I/O pin and must be translated appropriately to arrive at timing specs/
constraints for the physical interface. Measurements are with maximum output load of 25pF, input transition of 1ns and pad
configured with DSE = 1'b1 and SRE = 1'b0. I/O operating voltage ranges from 2.97 V to 3.63 V.
Valid pin combinations to be referred from K3xx*_Use sheet in IOmux.
Table 57. Ethernet MII (200 Mbps)
Symbol
Description
Min
Typ
Max
Unit
Condition
Spec
Number
—
RXCLK frequency
—
—
50
MHz
—
—
MII1
RXCLK pulse width
high
35
—
65
%
RXCLK
period
—
—
MII2
RXCLK pulse width
low
35
—
65
%
RXCLK
period
—
—
MII3
RXD[3:0], RXDV,
RXER to RXCLK
setup time
4
—
—
ns
—
—
MII4
RXCLK to RXD[3:0],
RXDV, RXER hold
time
2
—
—
ns
—
—
—
TXCLK frequency
—
—
50
MHz
—
—
Table continues on the next page...
NXP Semiconductors
S32K3XX
S32K3xx Data Sheet
S32K3XX
All information provided in this document is subject to legal disclaimers.
© 2025 NXP B.V. All rights reserved.
Product data sheet
Rev. 13 — 12 November 2025
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