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S32K310 bảng dữ liệu(PDF) 57 Page - NXP Semiconductors |
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S32K310 bảng dữ liệu(HTML) 57 Page - NXP Semiconductors |
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57 / 164 page ![]() Table 17. RUN mode supply currents (peripherals disabled) for S32K389, S32K3x8, S32K34x, S32K32x and S32K314...continued 125, max [11], [12] 146.7 164.7 178 171.3 188.7 235.6 0.8 4.2 [1] Current numbers are for reduced configuration and may vary based on user configuration and silicon process variation. [2] See the configurations in Table 23. [3] RUN IDD @ V15 includes Flash memory read current from the V11 voltage rail. [4] For S32K38x, the current from a V15 supply will flow through the external NMOS for the V11 regulation stage, and into the V11 pins of the device. [5] IO load current is not included. The actual current requirements for IOs will depend on the I/O configuration in the application. [6] RUN IDD @ VDD_HV_A includes Flash memory read current from the V25 voltage rail. [7] “typ” is indicative of the average current numbers at the nominal internally regulated V11 supply voltage, VDD_HV_A = 5.0V, VDD_HV_B = 5.0V, V15 = 1.5V, for the typical silicon process. [8] "max" is indicative of the maximum current numbers at the maximum internally regulated V11 supply voltage (1.16 V), VDD_HV_A = 5.5V, VDD_HV_B = 5.5V, V15= 1.65V, for the fast silicon process. [9] For the maximum allowable RUN current in an application, the junction temperature must be kept below the maximum specification, TJ < 150°C, to avoid self-heating. [10] “typ” is indicative of the average current numbers at the nominal internally regulated V11 supply voltage, VDD_HV_A = 5.0V, VDD_HV_B = 5.0V, V15 = 1.5V, for the typical silicon process. [11] "max" is indicative of the maximum current numbers at the maximum internally regulated V11 supply voltage (1.16 V), VDD_HV_A = 5.5V, VDD_HV_B = 5.5V, V15= 1.65V, for the fast silicon process. [12] For the maximum allowable RUN current in an application, the junction temperature must be kept below the maximum specification, TJ < 150°C, to avoid self-heating. Typical current numbers are indicative for typical silicon process and may vary based on the silicon distribution and user configuration. Typical conditions assumes VDD_HV_A = VREFH = 5 V, VDD_HV_B = 5V (if the VDD_HV_B domain present in the device), temperature = 25 °C and typical silicon process unless otherwise stated. Table 18. RUN mode supply currents (peripherals disabled) for S32K312, S32K311 and S32K310 Chip Ambient Temperature (°C) RUN Mode (mA) [1] Min. Config. [2] Single Core @80 MHz [Clock Option F] Min. Config. [2] Single Core @120 MHz [Clock Option B] S32K312 25, typ [6] 37 NA 37 NA 25, max [7] 44 47 85, typ [6] 42 43 85, max [7] 58.5 59.7 105, typ [6] 48.1 48.7 105, max [7] 76.4 77.8 125, typ [6] 56.5 57 Table continues on the next page... NXP Semiconductors S32K3XX S32K3xx Data Sheet S32K3XX All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 13 — 12 November 2025 Document feedback 57 / 164 |
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