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S32K310 bảng dữ liệu(PDF) 60 Page - NXP Semiconductors |
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S32K310 bảng dữ liệu(HTML) 60 Page - NXP Semiconductors |
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60 / 164 page ![]() Table 19. Example RUN mode configuration supply currents for S32K3x8, S32K34x, S32K32x and S32K314...continued 125, typ [7] 169 151 155 128 116 0.6 3.3 125, max [8], [9] 271 250 256 226 213 0.8 4.5 S32K342, S32K322, S32K341 25, typ [7] 115.3 93.2 96.1 79.6 64.1 NA NA NA 0.5 3.0 25, max [8] 128.9 109.3 109.8 90.9 74.5 0.8 3.6 85, typ [7] 125.0 102.7 105.8 89.2 73.6 0.5 3.0 85, max [8] 178.8 126.5 132.0 105.0 92.5 0.8 3.6 105, typ [7] 135.2 111.9 115.5 98.6 83.4 0.5 3.1 105, max [8] 219.6 184.6 188.5 168.5 152.5 0.8 3.8 125, typ [7] 145.8 123.8 127.3 110.2 94.7 0.5 3.1 125, max [8], [9] 258.1 235.2 243.9 206.9 183.7 0.8 4.3 [1] Current numbers are for reduced configuration and may vary based on user configuration and silicon process variation. [2] See the configurations in Table 23. [3] RUN IDD @ V15 includes Flash memory read current from the V11 voltage rail. [4] For S32K388, the current from a V15 supply will flow through the external NMOS for the V11 regulation stage, and into the V11 pins of the device. [5] IO current is not included. The actual current requirements for IOs will depend on the I/O configuration in the application. [6] RUN IDD @ VDD_HV_A includes Flash memory read current from the V25 voltage rail. [7] “typ” is indicative of the average current numbers at the nominal internally regulated V11 supply voltage, VDD_HV_A = 5.0V, VDD_HV_B = 5.0V, V15 = 1.5V, for the typical silicon process. [8] “max” is indicative of the maximum current numbers at the maximum internally regulated V11 supply voltage (1.16 V), VDD_HV_A = 5.5V, VDD_HV_B = 5.5V, V15 = 1.65V, for the fast silicon process. [9] For the maximum allowable RUN current in an application, the junction temperature must be kept below the maximum specification, TJ < 150°C, to avoid self-heating. Table 20. Example RUN mode configuration supply currents for S32K312, S32K311, S32K311 Chip Ambient Temperature (°C) RUN Mode (mA) [1] Config. 4 [2] Single Core @120 MHz Config. 5 [2] Single Core @80 MHz S32K312 25, typ [6] 54 NA 44 NA 25, max [7] 62 54 85, typ [6] 60 49 Table continues on the next page... NXP Semiconductors S32K3XX S32K3xx Data Sheet S32K3XX All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 13 — 12 November 2025 Document feedback 60 / 164 |
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