DS3105 datasheet(63/110 Pages) MAXIM

63 / 110 page

Preliminary. Subject to Change Without Notice.

DS3105

Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.

63 of 110

MCR4

Master Configuration Register 4

35h

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

T4FORCE[3:0]

Default

Bits 3 to 0: T4 DPL Force Selected Reference (T4FORCE[3:0]).

This field provides a way to force a specified

input clock to be the selected reference for the T4 DPLL. Internally this is accomplished by forcing the clock to have

the highest priority (as specified in PTAB1:REF1). Since the T4 DPLL always operates in revertive mode, the

forced clock automatically becomes the selected reference (as specified in PTAB1:SELREF) as well.

When a reference is forced, the activity monitor for that input continues to operate and affect the relevant ISR,

VALSR and MSR register bits. See section 7.6.3.

0000 = Automatic source selection (normal operation)

0001 = {unused value, undefined}

0010 = {unused value, undefined}

0011 = Force to IC3

0100 = Force to IC4

0101 = Force to IC5

0110 = Force to IC6

0111 = {unused value, undefined}

1000 = {unused value, undefined}

1001 = Force to IC9

1010 to 1110 = {unused value, undefined}

1111 = Automatic source selection (normal operation)

MCR5

Master Configuration Register 5

36h

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

RSV4

RSV3

RSV2

RSV1

IC6SF

Default

Bit 7: Reserved Bit 4 (RSV4).

This bit is reserved for future use, it can be written to and read back.

Bit 6: Reserved Bit 3 (RSV3).

This bit is reserved for future use, it can be written to and read back.

Bit 5: Reserved Bit 2 (RSV2).

This bit is reserved for future use, it can be written to and read back.

Bit 4: Reserved Bit 1 (RSV1).

This bit is reserved for future use, it can be written to and read back.

Bit 1: Input Clock 6 Signal Format (IC6SF).

For backward compatibility this bit can be written to and read back,

but it does not affect the IC6POS/NEG inputs pins. See Section 7.4.1.

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