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DS3105 bảng dữ liệu(PDF) 1 Page - Maxim Integrated Products |
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DS3105 bảng dữ liệu(HTML) 1 Page - Maxim Integrated Products |
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1 / 110 page ![]() Preliminary. Subject to Change Without Notice. Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement. 1 of 110 REV: 061507 GENERAL DESCRIPTION The DS3105 is a low-cost, feature-rich timing IC for telecom line cards. Typically the device accepts two reference clocks from dual redundant system timing cards. The DS3105 continually monitors both inputs and performs automatic hitless reference switching if the primary reference fails. The highly programmable DS3105 supports numerous input and output frequencies including frequencies required for SONET/SDH, Synchronous Ethernet (1G, 10G and 100Mb/s), wireless basestations and CMTS systems. PLL bandwidths from 18 Hz to 400 Hz are supported, and a wide variety of PLL characteristics and device features can be configured to meet the needs of many different applications. The DS3105 register set is backward compatible with Semtech’s ACS8525 line card timing IC. The DS3105 pinout is similar but not identical to the ACS8525. APPLICATIONS SONET/SDH, Synchronous Ethernet, PDH and Other Line Cards in WAN Equipment Including MSPPs, Ethernet Switches, Routers, DSLAMs, and Wireless Base Stations. FUNCTIONAL DIAGRAM FEATURES Advanced DPLL Technology Programmable PLL bandwidth: 18 Hz to 400 Hz Hitless Reference Switching, Automatic or Manual Holdover on Loss of All Input References Frequency Conversion Among SONET/SDH, PDH, Ethernet, Wireless and CMTS Rates 5 Input Clocks Two CMOS/TTL (≤125 MHz) Two LVDS/LVPECL/CMOS/TTL (≤156.25 MHz) Backup Input (CMOS/TLL) in Case of Complete Loss of System Timing References Three Optional Frame Sync Inputs (CMOS/TTL) Continuous Input Clock Quality Monitoring Numerous Input Clock Frequencies Supported - SONET/SDH: 6.48, N x 19.44, N x 51.84 MHz - Ethernet xMII: 2.5, 25, 125, 156.25 MHz - PDH: N x DS1, N x E1, N x DS2, DS3, E3 - Frame Sync: 2 kHz, 4 kHz, 8 kHz - Custom: Any Multiple of 2 kHz up to 131.072 MHz, Any Multiple of 8 kHz up to 155.52 MHz 2 Output Clocks One CMOS/TTL Output (≤125 MHz) One LVDS/LVPECL Output (≤312.50 MHz) Two Optional Frame Sync Outputs: 2 kHz, 8 kHz Numerous Output Clock Frequencies Supported - SONET/SDH: 6.48, N x 19.44, N x 51.84 MHz - Ethernet xMII: 2.5, 25, 125, 156.25, 312.5 MHz - PDH: N x DS1, N x E1, N x DS2, DS3, E3 - Other: 10, 10.24, 13, 30.72 MHz, plus other frequencies available upon request - Frame Sync: 2 kHz, 8 kHz - Custom Clock Rates: Any Multiple of 2 kHz up to 77.76 MHz, Any Multiple of 8 kHz up to 311.04 MHz General Suitable line card IC for stratum 3E/3/4, SMC, SEC Internal Compensation for Master Clock Oscillator SPI Processor Interface 1.8V Operation with 3.3V I/O (5V tolerant) Industrial Operating Temperature Range ORDERING INFORMATION PART TEMP RANGE PACKAGE DS3105LN -40 to 85 °C LQFP64 DS3105LN+ -40 to 85 °C LQFP64, RoHS compliant DS3105 Line Card Timing IC PRELIMINARY DATASHEET www.maxim-ic.com local oscillator control status DS3105 IC4 OC3 LVDS/LVPECL or CMOS/TTL IC3 FSYNC MFSYNC IC5 IC6 IC9 OC6 LVDS/LVPECL SYNC1 SYNC2 SYNC3 |
Số phần tương tự - DS3105 |
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Mô tả tương tự - DS3105 |
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