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TMPR4925 bảng dữ liệu(PDF) 304 Page - Toshiba Semiconductor |
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TMPR4925 bảng dữ liệu(HTML) 304 Page - Toshiba Semiconductor |
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304 / 590 page ![]() Chapter 10 PCI Controller 10-42 10.4.16 Satellite Mode PCI Status Register (PCISSTATUS) 0xD088 The PCI Status, Command Register (PCISTATUS) or the PMCSR Register of the Configuration Space cannot be accessed when the PCI Controller is in the Satellite mode. It is possible however to read values from either of these registers. 31 26 25 24 23 16 Reserved PS Reserved R: Type 00 : Initial value 15 14 13 12 11 10 9 8 7 0 DPE SSE RMA RTA STA DT MDPE Reserved RR RR R R R : Type 0 0 0 0 0 01 0 : Initial value Bits Mnemonic Field Name Description 31:26 Reserved 25:24 PS Power State PowerState (Initial value: 00, R) This is a shadow register of the PowerState field in the PMCSR Register. 23:16 Reserved 15 DPE Detected Parity Error Detected Parity Error (Initial value: 0, R) This is a shadow register of the PCISTATUS.DPE bit. 14 SSE Signaled System Error Signaled System Error (Initial value: 0, R) This is a shadow register of the PCISTATUS.SSE bit. 13 RMA Received Master Abort Received Master Abort (Initial value: 0, R) This is a shadow register of the PCISTATUS.RMA bit. 12 RTA Received Target Abort Received Target Abort (Initial value: 0, R) This is a shadow register of the PCISTATUS.RTA bit. 11 STA Signaled Target Abort Signaled Target Abort (Initial value: 0, R) This is a shadow register of the PCISTATUS.STA bit. 10:9 DT Set DEVSEL Timing DEVSEL Timing (Fixed value: 01, R) This is a shadow register of the PCISTATUS.DT field. 8MDPE Data Parity Detected Master Data Parity Error Detected (Initial value: 0, R) This is a shadow register of the PCISTATUS.MDPE bit. 7:0 Reserved Figure 10.4.16 Satellite Mode PCI Status Register |
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