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TMPR4925 bảng dữ liệu(PDF) 47 Page - Toshiba Semiconductor |
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TMPR4925 bảng dữ liệu(HTML) 47 Page - Toshiba Semiconductor |
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47 / 590 page ![]() Chapter 1 Features 1-1 1. Features 1.1 Outline The TMPR4925XB, to be referred as TX4925 MIPS RISC micro-controller is a highly integrated ASSP solution based on Toshiba’s TX49/H2 processor core, a 64-bit MIPS I, II, III ISA Instruction Set Architecture (ISA) compatible with additional instructions. For information on the architecture of the TX49/H2 core, including the instruction set, refer to the manual 64-bit TX System RISC, TX49/H2 Core Architecture. The TX4925 is a highly integrated device with integrated peripherals such as SDRAM memory controller, NAND Flash memory controller, PCI controller, AC-Link controller, PIO, SIO, SPI, CHI, PCMCIA I/F and Timer. This class of product is targeted for applications that require a high performance and cost-effective solution such as networking internet appliance and information terminal. |
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