TMPR4925 datasheet(81/590 Pages) TOSHIBA

tên linh kiện	TMPR4925

Giải thích chi tiết về linh kiện	64-Bit TX System RISC TX49 Family

PDF	590 Pages

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nhà sản xuất	TOSHIBA [Toshiba Semiconductor]

Trang chủ	http://www.semicon.toshiba.co.jp/eng

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Chapter 4 Address Mapping

4-3

4.2.3

The outline of the register map allocated built-in controllers is shown in Table 4.2.1, and the table of

the internal registers is shown in Table 4.2.2, respectively.

Please refer to “10.5 PCI Configuration Space Register” about PCI configuration register.

Table 4.2.1 Register Map

Offset Address

Peripheral Controller

Detail

0x0000 to 0x7FFF

Reserved

0x8000 to 0x8FFF

SDRAMC

Refer to 9.4

0x9000 to 0x9FFF

EBUSC

Refer to 7.4

0xA000 to 0xA7FF

Reserved

0xA800 to 0xAFFF

CHI

Refer to 16.4

0xB000 to 0xBFFF

DMAC

Refer to 8.4

0xC000 to 0xCFFF

NDFMC

Refer to 18.4

0xD000 to 0xDFFF

PCIC

Refer to 10.4

0xE000 to 0xEFFF

CONFIG

Refer to 5.2

0xF000 to 0xF0FF

TMR0

Refer to 12.4

0xF100 to 0xF1FF

TMR1

Refer to 12.4

0xF200 to 0xF2FF

TMR2

Refer to 12.4

0xF300 to 0xF3FF

SIO0

Refer to 11.4

0xF400 to 0xF4FF

SIO1

Refer to 11.4

0xF500 to 0xF50F

PIO

Refer to 13.4

0xF510 to 0xF6FF

IRC

Refer to 15.4

0xF700 to 0xF7FF

ACLC

Refer to 14.4

0xF800 to 0xF8FF

SPI

Refer to 17.4

0xF900 to 0xF9FF

RTC

Refer to 19.4

0xFA00 to 0xFFFF

Reserved

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