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TMPR4925 bảng dữ liệu(PDF) 300 Page - Toshiba Semiconductor

tên linh kiện TMPR4925
Giải thích chi tiết về linh kiện  64-Bit TX System RISC TX49 Family
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TMPR4925 bảng dữ liệu(HTML) 300 Page - Toshiba Semiconductor

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Chapter 10 PCI Controller
10-38
10.4.13 G2P Configuration Register (G2PCFG)
0xD060
31
16
Reserved
: Type
: Initial value
15
12
11
10
98
76
54
321
0
Reserved
BSWAPM0 BSWAPM1 BSWAPM2 BSWAPIO
IMEM0EN IMEM1EN IMEM2EN
IIOEN IRBER Reserved BSWAPI ASERR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W1C : Type
0/1
0/1
0/1
0/1
0
0
0
0
1
0/1
0
: Initial value
Bits
Mnemonic
Field Name
Description
31:12
Reserved
11
BSWAPM0
Byte Swap for
Memory Space 0
Byte Swap Disable for Memory Space 0
(Initial value: Little Endian Mode: 0; Big Endian Mode: 1, R/W)
Sets the byte swapping of Memory Space 0.
0: Do not perform byte swapping.
1: Perform byte swapping.
Please use the default state in most situations. If this bit is changed to “0” when in the
Big Endian Mode, the byte order of transfer to Memory Space 0 through DWORD (32-
bit) access will not change.
10
BSWAPM1
Byte Swap for
Memory Space 1
Byte Swap Disable for Memory Space 1
(Initial value: Little Endian Mode: 0; Big Endian Mode: 1, R/W)
Sets the byte swapping of Memory Space 1.
0: Do not perform byte swapping.
1: Perform byte swapping.
Please use the default state in most situations. If this bit is changed to "0” when in the
Big Endian Mode, the byte order of transfer to Memory Space 1 through DWORD (32-
bit) access will not change.
9
BSWAPM2
Byte Swap for
Memory Space 2
Byte Swap Disable for Memory Space 2
(Initial value: Little Endian Mode: 0; Big Endian Mode: 1, R/W)
Sets the byte swapping of Memory Space 2.
0: Do not perform byte swapping.
1: Perform byte swapping.
Please use the default state in most situations. If this bit is changed to “0” when in the
Big Endian Mode, the byte order of transfer to Memory Space 2 through DWORD (32-
bit) access will not change.
8
BSWAPIO
Byte Swap for I/O
Space
Byte Swap Disable for I/O Space
(Initial value: Little Endian Mode: 0; Big Endian Mode: 1, R/W)
Sets the byte swapping of I/O Space.
0: Do not perform byte swapping.
1: Perform byte swapping.
Please use the default state in most situations. If this bit is changed to “0” when in the
Big Endian Mode, the byte order of transfer to I/O Space through DWORD (32-bit)
access will not change.
7G2PM0EN
Initiator Memory
Space 0 Enable
Initiator Memory Space 0 Enable (Initial value: 0, R/W)
Controls PCI initiator access to Memory Space 0.
1: Memory Space 0 is valid.
0: Memory Space 0 is invalid.
6
G2PM1EN
Initiator Memory
Space 1 Enable
Initiator Memory Space 1 Enable (Initial value: 0, R/W)
Controls PCI initiator access to Memory Space 1.
1: Memory Space 1 is valid.
0: Memory Space 1 is invalid.
Figure 10.4.13 G2P Configuration Register (1/2)



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