PDP83TG720SWCSTQ1 datasheet(39/199 Pages) TI

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Table 7-9. RGMII Transmit Encoding

TX_CTRL

(POSITIVE EDGE)

TX_CTRL

(NEGATIVE EDGE)

TX_D[3:0]

DESCRIPTION

0000 through 1111

Normal Inter-Frame

0000 through 1111

Reserved

0000 through 1111

Normal Data Transmission

0000 through 1111

Transmit Error Propagation

Table 7-10. RGMII Receive Encoding

RX_CTRL

(POSITIVE EDGE)

RX_CTRL

(NEGATIVE EDGE)

RX_D[3:0]

DESCRIPTION

0000 through 1111

Normal Inter-Frame

0000 through 1101

Reserved

1110

False Carrier Indication

1111

Reserved

0000 through 1111

Normal Data Reception

0000 through 1111

Data Reception with Errors

The DP83TG720S-Q1 supports in-band status indication to help simplify link status detection. Inter-frame signals

on RX_D[3:0] pins as specified in Table 7-11.

Table 7-11. RGMII In-Band Status

RX_CTRL

RX_D3

RX_D[2:1]

RX_D0

Note:

In-band status is only valid when

RX_CTRL is low

Duplex Status:

0 = Half-Duplex

1 = Full-Duplex

RX_CLK Clock Speed:

00 = 2.5 MHz

01 = 25 MHz

10 = 125 MHz

11 = Reserved

Link Status:

0 = Link not established

1 = Valid link established

RGMII MAC Interface for Gigabit Ethernet has stringent timing requirements to meet system level performance.

To meet these timing requirements and to operate with different MACs over RGMII, it is advised to take the

following requirements into consideration when designing PCB. It is also recommended to check board level

signal integrity by using the DP83TG720 IBIS model.

RGMII-TX Requirements

• RGMII TX signals should be routed on board with control impedance of 50Ohm +/-15%.

• Max routing length should be limited to 5inch for better signal integrity performance.

• Figure 7-15 shows a RGMII interface requirements for TX* signals. MAC RGMII driver output impedance

should be 50Ohm+/-20%.

• Skew for all RGMII TX signals at TP2, in Figure 7-15, should be <±500ps.

• Signal Integrity at TP1 and TP2, in Figure 7-15, should be verified with IBIS model simulation and ensured

conformance to following requirements:

– At TP2, signal should meet rise/fall time of 1ns (20-80%) of signal amplitude.

– Rise/fall time should be monotonic between VIH/VIL level at TP2.

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DP83TG720S-Q1

SNLS604 – SEPTEMBER 2020

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