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845GL bảng dữ liệu(PDF) 108 Page - Intel Corporation |
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845GL bảng dữ liệu(HTML) 108 Page - Intel Corporation |
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108 / 193 page ![]() Functional Description 108 Intel® 82845G/82845GL/82845GV GMCH Datasheet 4.2.3 Memory Organization and Configuration In the following discussion the term “row” refers to a set of memory devices that are simultaneously selected by a chip select signal. The GMCH supports a maximum of 4 rows of memory. For the purposes of this discussion, a “side” of a DIMM is equivalent to a “row” of SDRAM devices. The memory bank address lines and the address lines allow the GMCH to support 64-bit wide x8 and x16 DIMMs using 64-Mb, 128-Mb, 256-Mb, and 512-Mb SDRAM technology. For the DDR SDRAM interface, Table 4-2 lists the supported DDR DIMM configurations. Note that the GMCH supports configurations defined in the JEDEC DDR DIMM specification only (A,B,C). Non-JEDEC standard DIMMs (e.g., double-sided x16 DDR SDRAM DIMMs) are not supported. For more information on DIMM configurations, refer to the JEDEC DDR DIMM specification. For the SDR SDRAM interface, Table 4-3 lists the supported SDR DIMM configurations. Note: Mixed mode or uneven, double-sided SDR SDRAM DIMMs are not supported. 4.2.3.1 Configuration Mechanism for DIMMs Detection of the type of SDRAM installed on the DIMM is supported via Serial Presence Detect (SPD) mechanism as defined in the JEDEC DIMM specification. This uses the SCL, SDA, and SA[2:0] pins on the DIMMs to detect the type and size of the installed DIMMs. No special programmable modes are provided on the GMCH for detecting the size and type of memory installed. Type and size detection must be done via the serial presence detection pins and is required to configure the GMCH. Table 4-2. Supported DDR DIMM Configurations Density 64 Mbit 128 Mbit 256 Mbit 512 Mbit Device Width X8 X16 X8 X16 X8 X16 X8 X16 Single / Double SS/DS SS/DS SS/DS SS/DS SS/DS SS/DS SS/DS SS/DS 184 pin DDR DIMMs 64 MB / 128 MB 32 MB / NA 128 MB / 256 MB 64 MB / NA 256 MB / 512 MB 128 MB / NA 512 MB / 1024 MB 256 MB/ NA Table 4-3. Supported SDR DIMM Configurations Density 64 Mbit 128 Mbit 256 Mbit 512 Mbit Device Width X8 X16 X8 X16 X8 X16 X8 X16 Single / Double SS/DS SS/DS SS/DS SS/DS SS/DS SS/DS SS/DS SS/DS 168 pin SDR DIMMs 64 MB / 128 MB 32 MB / 64 MB 128 MB / 256 MB 64 MB / 128 MB 256 MB / 512 MB 128 MB / 256 MB 512 MB / 1024 MB 256 MB / 512 MB |
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