845GL datasheet(34/193 Pages) INTEL

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Signal Description

Intel® 82845G/82845GL/82845GV GMCH Datasheet

2.5.1

Intel® DVO Signal Name to AGP Signal Name Pin Mapping

The 82845G GMCH multiplexes an ADD_Detect signal with the G_PAR signal on the AGP bus.

This signal acts as a strap and indicates whether the interface is in AGP or DVO mode (See

ADD_DETECT signal description for further information). GSBA(7:0) act as straps for an

ADD_ID. When an ADD card is present, ADD_DETECT=0 (DVO mode).

DVO Signal Name

AGP Signal Name

DVO Signal Name

AGP Signal Name

DVOB_D0

GAD_3

DVOC_D0

GAD_19

DVOB_D1

GAD_2

DVOC_D1

GAD_20

DVOB_D2

GAD_5

DVOC_D2

GAD_21

DVOB_D3

GAD_4

DVOC_D3

GAD_22

DVOB_D4

GAD_7

DVOC_D4

GAD_23

DVOB_D5

GAD_6

DVOC_D5

GC/BE_3#

DVOB_D6

GAD_8

DVOC_D6

GAD_25

DVOB_D7

GC/BE_0#

DVOC_D7

GAD_24

DVOB_D8

GAD_10

DVOC_D8

GAD_27

DVOB_D9

GAD_9

DVOC_D9

GAD_26

DVOB_D10

GAD_12

DVOC_D10

GAD_29

DVOB_D11

GAD_11

DVOC_D11

GAD_28

DVOB_CLK

GADSTB_0

DVOC_CLK

GADSTB_1

DVOB_CLK#

GADSTB_0#

DVOC_CLK#

GADSTB_1#

DVOB_HSYNC

GAD_0

DVOC_HSYNC

GAD_17

DVOB_VSYNC

GAD_1

DVOC_VSYNC

GAD_16

DVOB_BLANK#

GC/BE_1#

DVOC_BLANK#

GAD_18

DVOB_CCLKINT#

GAD_13

DVOBC_INTR#

GAD_30

DVOB_FLDSTL

GAD_14

DVOC_FLDSTL

GAD_31

DVOBC_RCOMP

AGP RCOMP

ADDID[7:0]

GSBA_[7:0]

MI2CCLK

GIRDY#

MDVI DATA

GFRAME#

MI2CDATA

GDEVSEL#

MDDC CLK

GAD_15

MDVI CLK

GTRDY#

MDDC DATA

GSTOP#

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