MSP432P411VIPZ datasheet(131/212 Pages) TI1

131 / 212 page

131

MSP432P4111, MSP432P4011, MSP432P411Y

MSP432P401Y, MSP432P411V, MSP432P401V

www.ti.com

SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018

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Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V

Detailed Description

6.8

System Control

System Control comprises the modules that govern the overall behavior of the device, including power

management, operating modes, clocks, reset handling, and user configuration settings.

6.8.1

Device Resets

MSP432P4x1x devices support multiple classes of reset. Each class results in a different level of initiation

of device logic, thus allowing the application developer to initiate different resets based reset requirements

during code development and debug. The following subsections cover the classes of reset in the device.

6.8.1.1

Power On/Off Reset (POR)

The POR initiates a complete initialization of the application settings and device configuration information.

This class of reset may be initiated either by the PSS, the PCM, the RSTn pin, the Clock System upon

DCO external resistor short-circuit fault, or the device emulation logic (through the debugger). From an

application perspective, all sources of POR return the device to the same state of initialization.

NOTE

Depending on the source of the reset, the device may exhibit different wake-up latencies

from the POR. This implementation enables optimization of the reset recovery time.

6.8.1.2

Reboot Reset

The Reboot Reset is identical to the POR and allows the application to emulate a POR class reset without

needing to reset the device or activate the RSTn pin. A Reboot Reset can also be initiated through the

debugger and, hence, does not affect the debug connection to the device, while a POR terminates the

debug connection.

MSP432P411VIPZ bảng dữ liệu(PDF) 131 Page - Texas Instruments