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MSP432P411VIPZ bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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MSP432P411VIPZ bảng dữ liệu(HTML) 5 Page - Texas Instruments |
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5 / 212 page  5 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V www.ti.com SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Revision History Copyright © 2017–2018, Texas Instruments Incorporated Table of Contents 1 Device Overview ......................................... 1 1.1 Features .............................................. 1 1.2 Applications ........................................... 2 1.3 Description ............................................ 2 1.4 Functional Block Diagram ............................ 3 2 Revision History ......................................... 5 3 Device Comparison ..................................... 6 3.1 Related Products ..................................... 6 4 Terminal Configuration and Functions .............. 7 4.1 Pin Diagram for MSP432P411xI Devices ............ 7 4.2 Pin Diagram for MSP432P401xI Devices ............ 8 4.3 Pin Attributes ......................................... 9 4.4 Signal Descriptions .................................. 20 4.5 Pin Multiplexing ..................................... 29 4.6 Buffer Types ......................................... 29 4.7 Connections for Unused Pins ....................... 30 5 Specifications ........................................... 31 5.1 Absolute Maximum Ratings ........................ 31 5.2 ESD Ratings ........................................ 31 5.3 Recommended Operating Conditions ............... 31 5.4 Recommended External Components ............. 32 5.5 Operating Mode VCC Ranges ....................... 32 5.6 Operating Mode CPU Frequency Ranges ......... 33 5.7 Operating Mode Peripheral Frequency Ranges .... 33 5.8 Operating Mode Execution Frequency vs Flash Wait-State Requirements ........................... 34 5.9 Current Consumption During Device Reset ......... 35 5.10 Current Consumption in LDO-Based Active Modes – Dhrystone 2.1 Program ................... 35 5.11 Current Consumption in DC/DC-Based Active Modes – Dhrystone 2.1 Program ................... 35 5.12 Current Consumption in Low-Frequency Active Modes – Dhrystone 2.1 Program ................... 36 5.13 Typical Characteristics of Active Mode Currents for CoreMark Program .................................. 37 5.14 Typical Characteristics of Active Mode Currents for Prime Number Program ............................. 38 5.15 Typical Characteristics of Active Mode Currents for Fibonacci Program .................................. 39 5.16 Typical Characteristics of Active Mode Currents for While(1) Program ................................... 40 5.17 Typical Characteristics of Low-Frequency Active Mode Currents for CoreMark Program .............. 41 5.18 Current Consumption in LDO-Based LPM0 Modes . 42 5.19 Current Consumption in DC/DC-Based LPM0 Modes ............................................... 42 5.20 Current Consumption in Low-Frequency LPM0 Modes ............................................... 42 5.21 Current Consumption in LPM3, LPM4 Modes ...... 43 5.22 Current Consumption in LPM3 Modes With LCD ... 44 5.23 Current Consumption in LPM3.5, LPM4.5 Modes .. 44 5.24 Current Consumption of Digital Peripherals ........ 45 5.25 Thermal Resistance Characteristics ................ 45 5.26 Timing and Switching Characteristics ............... 46 6 Detailed Description ................................... 97 6.1 Overview ............................................ 97 6.2 Processor and Execution Features ................. 97 6.3 Memory Map ........................................ 98 6.4 Memories on MSP432P4x1x ....................... 121 6.5 DMA ................................................ 126 6.6 Memory Map Access Details ...................... 127 6.7 Interrupts ........................................... 128 6.8 System Control ..................................... 131 6.9 Peripherals ......................................... 137 6.10 Code Development and Debug .................... 147 6.11 Performance Benchmarks ......................... 149 6.12 Input/Output Diagrams ............................. 151 6.13 Device Descriptors (TLV) .......................... 192 6.14 Identification ........................................ 195 7 Applications, Implementation, and Layout ...... 197 7.1 Device Connection and Layout Fundamentals .... 197 7.2 Peripheral and Interface-Specific Design Information ......................................... 198 8 Device and Documentation Support .............. 200 8.1 Getting Started and Next Steps ................... 200 8.2 Device and Development Tool Nomenclature ..... 200 8.3 Tools and Software ................................ 201 8.4 Documentation Support ............................ 203 8.5 Related Links ...................................... 205 8.6 Community Resources ............................. 205 8.7 Trademarks ........................................ 205 8.8 Electrostatic Discharge Caution ................... 205 8.9 Export Control Notice .............................. 205 8.10 Glossary ............................................ 206 9 Mechanical, Packaging, and Orderable Information ............................................. 206 2 Revision History Changes from December 16, 2017 to February 2, 2018 Page • Removed mention of an internal charge pump on the LCD_F module in Section 6.9.11, LCD Controller (LCD_F) . 146 |
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