MSP432P411VIPZ datasheet(32/212 Pages) TI1

32 / 212 page

MSP432P4111, MSP432P4011, MSP432P411Y

MSP432P401Y, MSP432P411V, MSP432P401V

SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018

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Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V

Specifications

(1)

For optimum performance, select components that match the NOM values in this table.

(2)

See Section 7 for more details on component selection, placement, and related PCB design guidelines.

(3)

Consider the tolerances of the capacitance and inductance values when choosing components to ensure that the MIN and MAX limits

are never exceeded.

(4)

CDVCC should not be smaller than CVCORE.

5.4

Recommended External Components

(1) (2) (3)

MIN

NOM

MAX

UNIT

CDVCC

Capacitor on DVCC pin

For DC/DC operation(4)

3.3

4.7

µF

For LDO-only operation

3.3

4.7

CVCORE

Capacitor on VCORE pin

For DC/DC operation, including

capacitor tolerance

1.54

4.7

µF

For LDO-only operation, including

capacitor tolerance

100

9000

CAVCC

Capacitor on AVCC pin

3.3

4.7

µF

LVSW

Inductor between VSW and VCORE pins for DC/DC

3.3

4.7

µH

RLVSW-DCR

Allowed DCR for LVSW

150

350

mΩ

ISAT-LVSW

LVSW saturation current

700

(1)

Flash remains active only in active modes and LPM0 modes.

(2)

Low-frequency active and low-frequency LPM0, LPM3, LPM4, and LPM3.5 modes are based on LDO only.

(3)

When VCC falls below the specified MIN value, the DC/DC operation automatically switches to LDO, as long as the VCC drop is slower

than the rate that is reliably detected. See Table 5-20 for more details.

(4)

Core voltage is off in LPM4.5 mode.

5.5

Operating Mode VCC Ranges

over operating free-air temperature (unless otherwise noted)

PARAMETER

OPERATING MODE

TEST CONDITIONS

MIN

MAX

UNIT

VCC_LDO

(1) (2)

AM_LDO_VCORE0

AM_LF_VCORE0

LPM0_LDO_VCORE0

LPM0_LF_VCORE0

LPM3_VCORE0

LPM4_VCORE0

LPM3.5

AM_LDO_VCORE1

AM_LF_VCORE1

LPM0_LDO_VCORE1

LPM0_LF_VCORE1

LPM3_VCORE1

LPM4_VCORE1

LDO active, SVSMH disabled

1.62

3.7

LDO active, SVSMH enabled

1.71

3.7

VCC_DCDC_DF0

AM_DCDC_VCORE0

LPM0_DCDC_VCORE0

AM_DCDC_VCORE1

LPM0_DCDC_VCORE1

DC/DC active, DC/DC operation not forced

(DCDC_FORCE = 0), SVSMH enabled or

disabled(3)

2.0

3.7

VCC_DCDC_DF1

AM_DCDC_VCORE0

LPM0_DCDC_VCORE0

AM_DCDC_VCORE1

LPM0_DCDC_VCORE1

DC/DC active, DC/DC operation forced

(DCDC_FORCE = 1), SVSMH enabled or disabled

1.8

3.7

VCC_VCORE_OFF

(4)

LPM4.5

LDO disabled, SVSMH disabled

1.62

3.7

LDO disabled, SVSMH enabled

1.71

3.7

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