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MSP432P411VIPZ bảng dữ liệu(PDF) 99 Page - Texas Instruments |
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MSP432P411VIPZ bảng dữ liệu(HTML) 99 Page - Texas Instruments |
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99 / 212 page ![]() Flash Memory Region 0x0040_0000 Reserved 0x0100_0000 SRAM Region 0x0110_0000 Reserved 0x1FFF_FFFF ROM Region 0x0200_0000 0x0210_0000 Reserved 0x0000_0000 99 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V www.ti.com SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated Figure 6-2. Code Zone Memory Map 6.3.1.1 Flash Memory Region The 4-MB region from 0x0000_0000 to 0x003F_FFFF is defined as the flash memory region. This region is further divided into different types of flash memory regions, which are explained in Section 6.4.1. 6.3.1.2 SRAM Region The 1-MB region from 0x0100_0000 to 0x010F_FFFF is defined as the SRAM region. This region is also aliased in the SRAM zone of the device, thereby allowing efficient access to the SRAM, both for instruction fetches and data reads. See Section 6.4.2 for more details. 6.3.1.3 ROM Region The 1-MB region from 0x0200_0000 to 0x020F_FFFF is defined as the ROM region. See Section 6.4.4 for details about the ROM. 6.3.2 SRAM Zone Memory Map The SRAM zone of the device lies in the address range of 0x2000_0000 to 0x3FFF_FFFF. This is further divided as shown in Figure 6-3. |
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