MSP432P411VIPZ datasheet(50/212 Pages) TI1

50 / 212 page

MSP432P4111, MSP432P4011, MSP432P411Y

MSP432P401Y, MSP432P411V, MSP432P401V

SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018

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Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V

Specifications

Table 5-7 lists the latencies required to change to and from LPM3.5 and LPM4.5 modes.

(1)

This is the latency from WFI instruction execution by CPU to LPM3.5 mode entry.

(2)

This is the latency from WFI instruction execution by CPU to LPM4.5 mode entry.

(3)

This is the latency from I/O wake-up event to start of user application code.

Table 5-7. LPM3.5, LPM4.5 Mode Transition Latencies

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

ORIGINAL

OPERATING MODE

FINAL OPERATING

MODE

TEST CONDITIONS

TYP

MAX

UNIT

tAMLDOx_LPM3.5

(1)

AM_LDO_VCOREx

LPM3.5

Transition from AM_LDO_VCORE0 or

AM_LDO_VCORE1 to LPM3.5

µs

tAMDCDCx_LPM3.5

(1)

AM_DCDC_VCOREx

LPM3.5

Transition from AM_DCDC_VCORE0 or

AM_DCDC_VCORE1 to LPM3.5

µs

tAMLFx_LPM3.5

(1)

AM_LF_VCOREx

LPM3.5

Transition from AM_LF_VCORE0 or

AM_LF_VCORE1 to LPM3.5

224

275

µs

tAMLDOx_LPM4.5

(2)

AM_LDO_VCOREx

LPM4.5

Transition from AM_LDO_VCORE0 or

AM_LDO_VCORE1 to LPM4.5

µs

tAMDCDCx_LPM4.5

(2)

AM_DCDC_VCOREx

LPM4.5

Transition from AM_DCDC_VCORE0 or

AM_DCDC_VCORE1 to LPM4.5

µs

tAMLFx_LPM4.5

(2)

AM_LF_VCOREx

LPM4.5

Transition from AM_LF_VCORE0 or

AM_LF_VCORE1 to LPM4.5

230

248

µs

tLPM3.5_AMLDO0

(3)

LPM3.5

AM_LDO_VCORE0

Transition from LPM3.5 to

AM_LDO_VCORE0

0.7

0.8

tLPM4.5_AMLDO0_SVSMON, 100 nF

(3)

LPM4.5

AM_LDO_VCORE0

Transition from LPM4.5 to

AM_LDO_VCORE0,

SVSMH enabled while in LPM4.5,

CVCORE = 100 nF

0.8

0.9

tLPM4.5_AMLDO0_SVSMON, 4.7 µF

(3)

LPM4.5

AM_LDO_VCORE0

Transition from LPM4.5 to

AM_LDO_VCORE0,

SVSMH enabled while in LPM4.5,

CVCORE = 4.7 µF

0.9

1.0

tLPM4.5_AMLDO0_SVSMOFF, 100 nF

(3)

LPM4.5

AM_LDO_VCORE0

Transition from LPM4.5 to

AM_LDO_VCORE0,

SVSMH disabled while in LPM4.5,

CVCORE = 100 nF

1.0

1.1

tLPM4.5_AMLDO0_SVSMOFF, 4.7 µF

(3)

LPM4.5

AM_LDO_VCORE0

Transition from LPM4.5 to

AM_LDO_VCORE0,

SVSMH disabled while in LPM4.5,

CVCORE = 4.7 µF

1.1

1.2

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