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6402 bảng dữ liệu(PDF) 54 Page - Intel Corporation |
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6402 bảng dữ liệu(HTML) 54 Page - Intel Corporation |
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54 / 250 page ![]() Debug and Logic Analyzer Mode 54 Intel® 6400/6402 Advanced Memory Buffer Datasheet Figure 5-1 is a conceptual depiction of the AMB used in a LAI mode application. 5.1.1 LAI Mode Architecture The diagram below illustrates the AMB as a functional block when used as a LAI. The normal southbound and northbound links, the reference clock, and the SMB bus are used “as is”. The channel traffic is reflected onto the DRAM interface with frame alignment for access with a logic analyzer. To be effective in collecting useful FBD traces, the information provided to a logic analyzer must include not only a demuxed copy of the direct information transferred on the links, but also several types of derived information that a logic analyzer is not equipped to derive itself. These include specifically: • Cross-triggering information with finer timing granularity than LA can achieve • Simple filtering (qualified storage) opportunities recognition • Traffic framing Figure 5-1. AMB LAI Mode Usage Diagram MCH DIMM0 DRAM AMB AMB In LAI Mode LAI Interposer Probe Assembly DIMM1 Showing only southbound FBD Links, but northbound follow same path in reverse. Standard LA High Density Probes Concept Instantiation of LAI Interposer Using AMB Interposed DIMM DIMM2 DIMM3 |
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