6402 datasheet(13/250 Pages) INTEL

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Intel® 6400/6402 Advanced Memory Buffer Datasheet

Introduction

1.3

Interfaces

Figure 1-2 illustrates the AMB and all of its interfaces. They consist of two FBD links,

one DDR2 channel, and an SMBus interface. Each FBD link connects the AMB to a host

memory controller or an adjacent FBD. The DDR2 channel supports direct connection to

the DDR2 SDRAMs on a Fully Buffered DIMM.

Figure 1-1. Advanced Memory Buffer Block Diagram

PLL

Ref Clock

Southbound

Data In

1x2

10x2

DRAM Clock

10x2

Southbound

Data Out

DRAM

Data / Strobe

72 + 18x2

Northbound

Data Out

Northbound

Data In

DRAM Clock #

DRAM Address /

Command Copy 1

NORTH

SOUTH

Data CRC Gen

& Read FIFO

deep

Write

Data

FIFO

Data Out

Cmd Out

Sync & Idle

Pattern

Generator

Command

Decoder &

CRC Check

External MEMBIST

DDR Calibration &

DDR IOBIST/DFX

Data In

SMbus

Controller

SMBus

Thermal

Sensor

mux

IBIST - RX

Link Init SM

and Control

and CSRs

14x2

mux

failover

14*6*2

IBIST - RX

LAI Logic

NB LAI Buffer

DRAM Address /

Command Copy 2

DDR State

Controller

and CSRs

LAI

Controller

14x2

failover

DRAM Cmd

Core Control

and CSRs

Reset

Init

patterns

Data Merge

Re-synch

Re-Time

PISO

demux

10*12

Data Merge

Re-synch

Re-Time

PISO

demux

Link Init SM

and Control

and CSRs

14*12

2/03/04

Advance Memory Buffer

Block DIagram

IBIST - TX

Reset

Control

Reset#

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