6402 datasheet(67/250 Pages) INTEL

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Intel® 6400/6402 Advanced Memory Buffer Datasheet

Debug and Logic Analyzer Mode

5.1.9

LAI Block Diagram

Figure 5-9 is a block diagram of the LAI implementation.

The LAI block defines a frame from the host (not the AMB) point-of-view, so the slota

command is delayed by one core cycle relative to the slotb and slotc commands. The

southbound delay pipeline consists of one set of core registers for slota, and one set of

core registers for delayed slota, and slotb and slotc.

The protocol unwrapping and pattern recognition block takes the registered

southbound frame and detects and logs any local events. Events are selected in this

same cycle, registered on the core clock, and then forwarded to the DDR cluster. The

southbound frame is also registered once more and forwarded to the DDR cluster.

The northbound registers the line this data to the same clock domain as the

southbound data before it is forwarded to the DDR cluster.

Figure 5-9. Block Diagram of AMB in LAI Mode

Reference clock

Southbound In

Northbound Out

Southbound Out

Northbound In

S[59:00]

CLK[p,n]

AMB in LAI Mode

SMB

TRIG[10:0]

QUAL

FRAME

N[83:00]

MODE

EV[3:0]

Retiming

Demux

Deskew

Southbound

Delay

Registers

Protocol

&Pattern

Recognition

Remainder of path unmodified*

Retiming &

Merge*

Demux

Deskew

Remainder of path unmodified*

Events

Selection,

Responses

Control/Status

Northbound

Delay

Registers

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