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S32K310 bảng dữ liệu(PDF) 115 Page - NXP Semiconductors |
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S32K310 bảng dữ liệu(HTML) 115 Page - NXP Semiconductors |
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115 / 164 page  [2] RGMII timing specifications is valid for 3.3V nominal I/O pad supply voltage. [3] Output timing valid for maximum external load CL = 13.5 pF (includes PCB trace, package trace (around 2pF) and flash input load). RXC (at transmitter) RXC (at receiver) RX_CTL RXD[8:5][3:0] RXD[7:4][3:0] RXD[8:5] RXD[7:4] RXD[3:0] RXD[4] RXDV RXD[9] RXERR TskewT TskewR Figure 59. RGMII Receive Timing TXC (at transmitter) TXC (at receiver) TX_CTL TXD[8:5][3:0] TXD[7:4][3:0] TXD[8:5] TXD[7:4] TXD[3:0] TXD[4] TXEN TXD[9] TXERR TskewT TskewR Figure 60. RGMII Transmit Timing 12.8.5 MDIO timing specifications The following table describes the MDIO electrical characteristics. Measurements are with maximum output load of 25 pF, input transition of 1 ns and pad configured with fastest slew settings (DSE = 1'b1 and SRE = 1’b0). I/O operating voltage ranges from 2.97 V to 3.63 V. MDIO pin must have external Pull-up. Valid pin combinations to be referred from K3xx*_Use sheet in IOmux. Table 60. MDIO timing specifications Symbol Description Min Typ Max Unit Condition Spec Number — MDC clock frequency — — 2.5 MHz — — MDC1 MDC pulse width high 40 — 60 %MDC period — MDC1 MDC2 MDC pulse width low 40 — 60 %MDC period — MDC2 MDC5 MDC falling edge to MDIO output valid(maximum propagation delay) — — 25 ns — MDC5 MDC6 MDC falling edge to MDIO output -10 — — ns — MDC6 Table continues on the next page... NXP Semiconductors S32K3XX S32K3xx Data Sheet S32K3XX All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 13 — 12 November 2025 Document feedback 115 / 164 |
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