T83C5121XXX-ICSIL datasheet(44/115 Pages) ATMEL

tên linh kiện	T83C5121XXX-ICSIL

Giải thích chi tiết về linh kiện	8-bit Microcontroller with Multiprotocol Smart Card Interface

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A/T8xC5121

4164G–SCR–07/06

Table 22. SCRBUF Register

SCRBUF (S:AA read-only, SCRS = 1)

Smart Card Receive Buffer Register

Reset Value = 0000 0000b

Table 23. SCETU1 Register

SCETU1 (S:ADh, SCRS = 1)

Smart Card ETU Register 1

Reset Value = 0XXX X001b

–

–––

––

Bit

Number

Bit

Mnemonic

Description

––

Provides the byte received from the I/O pin when SCRI is set.

Bit ordering on the I/O pin depends on the Convention (see SCICR Register).

COMP

––

ETU10

ETU9

ETU8

Bit

Number

Bit

Mnemonic

Description

7COMP

Compensation

Clear this bit when no time compensation is needed (i.e. when the ETU to Card

CLK period ratio is close to an integer with an error less than 1/4 of Card CLK

period).

Set this bit otherwise and reduce the ETU period by 1 Card CLK cycle for even

bits.

6-3

–

Reserved

The value read from these bits is indeterminate. Do not change these bits .

2-0

ETU[10:8]

ETU MSB

Used together with the ETU LSB (see SCETU0 Register).

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