T83C5121XXX-ICSIL datasheet(89/115 Pages) ATMEL

89 / 115 page

A/T8xC5121

4164G–SCR–07/06

Asynchronous Modes

(Modes 1, 2 and 3)

The Serial Port has one 8-bit and two 9-bit asynchronous modes of operation. Figure 43

shows the Serial Port block diagram in such asynchronous modes.

Figure 43. Serial I/O Port Block Diagram (Modes 1, 2 and 3)

Mode 1

Mode 1 is a full-duplex, asynchronous mode. The data frame (see Figure 44) consists of

10 bits: one start, eight data bits and one stop bit. Serial data is transmitted on the TXD

pin and received on the RXD pin. When a data is received, the stop bit is read in the

RB8 bit in SCON register.

Figure 44. Data Frame Format (Mode 1)

Modes 2 and 3

Modes 2 and 3 are full-duplex, asynchronous modes. The data frame (see Figure 45)

consists of 11 bits: one start bit, eight data bits (transmitted and received LSB first), one

programmable ninth data bit and one stop bit. Serial data is transmitted on the TXD pin

and received on the RXD pin. On receive, the ninth bit is read from RB8 bit in SCON

tively, you can use the ninth bit as a command/data flag.

Figure 45. Data Frame Format (Modes 2 and 3)

Transmission (Modes 1, 2

and 3)

To initiate a transmission, write to SCON register, setting SM0 and SM1 bits according

to Table 64, and setting the ninth bit by writing to TB8 bit. Then, writing the byte to be

transmitted to SBUF register starts the transmission.

Reception (Modes 1, 2 and 3)

To prepare for a reception, write to SCON register, setting SM0 and SM1 bits according

to Table 64, and setting REN bit. The actual reception is then initiated by a detected

high-to-low transition on the RXD pin.

TB8

SCON.3

IBRG

CLOCK

RXD

TXD

SBUF Tx SR

Rx SR

SM1

SCON.6

SM0

SCON.7

Mode Decoder

M3 M2 M1 M0

SCON.0

SCON.1

Mode & Clock

Controller

SBUF Rx

RB8

SCON.2

SM2

SCON.4

CLOCK

PER

CLOCK

Mode 1

Start Bit

8-bit Data

Stop Bit

Modes 2 and 3

Start Bit

9-bit Data

Stop Bit

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