T83C5121XXX-ICSIL datasheet(82/115 Pages) ATMEL

82 / 115 page

A/T8xC5121

4164G–SCR–07/06

Figure 34. UART Timings in Mode 1

Figure 35. UART Timings in Modes 2 and 3

Automatic Address

Recognition

The automatic address recognition feature is enabled when the multiprocessor commu-

nication feature is enabled (SM2 bit in SCON register is set).

Implemented in hardware, automatic address recognition enhances the multiprocessor

communication feature by allowing the serial port to examine the address of each

incoming command frame. Only when the serial port recognizes its own address, the

receiver sets RI bit in SCON register to generate an interrupt. This ensures that the CPU

is not interrupted by command frames addressed to other devices.

If desired, you may enable the automatic address recognition feature in mode 1. In this

configuration, the stop bit takes the place of the ninth data bit. Bit RI is set only when the

received command frame address matches the device’s address and is terminated by a

valid stop bit.

To support automatic address recognition, a device is identified by a given address and

a broadcast address.

Note:

The multiprocessor communication and automatic address recognition features cannot

be enabled in mode 0 (i.e., setting SM2 bit in SCON register in mode 0 has no effect).

Given Address

Each device has an individual address that is specified in SADDR register; the SADEN

device’s given address. The don’t care bits provide the flexibility to address one or more

slaves at a time. The following example illustrates how a given address is formed.

Data Byte

SMOD0 = X

Stop

Bit

Start

Bit

RXD

SMOD0 = 1

SMOD0 = 0

Data Byte

Ninth

Bit

Stop

Bit

Start

Bit

RXD

SMOD0 = 1

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