PI7C8150ANDE datasheet(71/111 Pages) PERICOM

71 / 111 page

PI7C8150A

2-PORT PCI-TO-PCI BRIDGE

Page 71 of 111

APRIL 2006 – Revision 1.1

An external shift register should be used to load and shift the data. The GPIO pins are used

for shift register control and serial data input. Table 10-1 shows the operation of the GPIO

pins.

Table 10-1. GPIO Operation

GPIO Pin

Operation

GPIO[0]

Shift register clock output at 33MHz max frequency

GPIO[1]

Not used

GPIO[2]

Shift register control

0: Load

1: Shift

GPIO[3]

Not used

The data is input through the dedicated input signal, MSK_IN.

The shift register circuitry is not necessary for correct operation of PI7C8150A. The shift

outputs or tied HIGH to force all secondary clock outputs HIGH. Table 10-2 shows the

format of the serial stream.

Table 10-2. GPIO Serial Data Format

Bit

Description

S_CLKOUT

[1:0]

Slot 0 PRSNT#[1:0] or device 0

[3:2]

Slot 1 PRSNT#[1:0] or device 1

[5:4]

Slot 2 PRSNT#[1:0] or device 2

[7:6]

Slot 3 PRSNT#[1:0] or device 3

[8]

Device 4

[9]

Device 5

[10]

Device 6

[11]

Device 7

[12]

Device 8

[13]

PI7C8150A S_CLKIN

[14]

Reserved

[15]

Reserved

The first 8 bits contain the PRSNT#[1:0] signal values for four slots, and these bits control

the S_CLKOUT[3:0] outputs. If one or both of the PRSNT#[1:0] signals are 0, that

indicates that a card is present in the slot and therefore the secondary clock for that slot is

not masked. If these clocks are connected to devices and not to slots, one or both of the bits

should be tied low to enable the clock.

The next 5 bits are the clock mask for devices; each bit enables or disables the clock for

one device. These bits control the S_CLKOUT[8:4] outputs: 0 enables the clock, and 1

disables the clock.

Bit 13 is the clock enable bit for S_CLKOUT[9], which is connected to PI7C8150A’s

S_CLKIN input.

If desired, the assignment of S_CLKOUT outputs to slots, devices, and PI7C8150A’s

S_CLKIN input can be rearranged from the assignment shown here. However, it is

important that the serial data stream format match the assignment of S_CLKOUT.

The 8 least significant bits are connected to the PRSNT# pins for the slots. The next 5 bits

are tied high to disable their respective secondary clocks because those clocks are not

06-0057

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