CYT4DNJBJS datasheet(157/209 Pages) INFINEON

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Datasheet

157

002-24601 Rev. *I

2023-02-14

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M7 dual

Electrical specifications

Table 26-25

PLL specifications

Spec ID

Parameter

Description

Min

Typ

Max Units

Details/conditions

PLL Specifications for “PLL without SSCG and Fractional Operation” (PLL200)

SID340

tPLL200_LOCK Time to achieve PLL lock

–

µs

Time from stable

reference clock until PLL

frequency is within 0.1%

of final value and lock

indicator is set

SID341

fOUT

Output frequency from

PLL block (PLL_OUT)

10.998

–

200.03 MHz

SID346

fIN

PLL input frequency

(Reference Clock fREF)

3.988

–

33.34 MHz

SID347

IPLL_200M

PLL operating current

–

0.87

1.85

mA fOUT = 200 MHz

SID348C fPLL_VCO

VCO frequency, clock

output of 'Voltage Control

Oscillator (VCO)'

169.97

–

400.06 MHz

SID349C fPLL_PFD

Phase Detector

Frequency, clock output

of the Reference Divider

(Q) and Feedback Divider

(P)

3.988

–

8.0012 MHz

SID342

PLL_LJIT1

Long term jitter

–0.25

–

0.25

For 125 ns

Guaranteed by design

fPLL_VCO: 320 MHz or 400 MHz

fPLL_OUT: 40 MHz to 200 MHz

fPLL_PFD: 8 MHz

fPLL_IN: ECO

SID343

PLL_LJIT2

Long term jitter

–0.5

–

0.5

For 500 ns

Guaranteed by design

fPLL_VCO: 320 MHz or 400 MHz

fPLL_OUT: 40 MHz to 200 MHz

fPLL_PFD: 8 MHz

fPLL_IN: ECO

SID344

PLL_LJIT3

Long term jitter

–0.5

–

0.5

For 1000 ns

Guaranteed by design

fPLL_VCO: 320 MHz or 400 MHz

fPLL_OUT: 40 MHz to 200 MHz

fPLL_PFD: 8 MHz

fPLL_IN: ECO

SID345A1 PLL_LJIT5

Long term jitter

–0.75

–

0.75

For 10000 ns

Guaranteed by design

fPLL_VCO: 320 MHz or 400 MHz

fPLL_OUT: 40 MHz to 200 MHz

fPLL_PFD: 8 MHz

fPLL_IN: ECO

PLL Specifications for “PLL with SSCG and Fractional Operation” (PLL400)

SID340A tPLL400_LOCK Time to achieve PLL lock

–

µs

SID341A fOUT

Output frequency from

PLL block (PLL_OUT)

24.996

–

400.06 MHz

SID343A SPREAD_D

Spread spectrum

modulation depth

0.5

–

Downspread only,

triangle modulation

SID343B fSPREAD_MR

Spread spectrum

modulation rate

––

kHz Selected by modulation

divider from fPFD

SID346A fIN

PLL input frequency

(Reference Clock fREF)

3.988

–

33.34 MHz

SID347A IPLL_400M

PLL operating current

–

1.4

2.2

mA fOUT = 400 MHz

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