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LPC86X bảng dữ liệu(PDF) 21 Page - NXP Semiconductors |
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LPC86X bảng dữ liệu(HTML) 21 Page - NXP Semiconductors |
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21 / 99 page ![]() LPC86x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2023. All rights reserved. Product data sheet Rev.3 — 28 April 2023 21 of 97 NXP Semiconductors LPC86x 32-bit Arm Cortex-M0+ microcontroller Remark: The functionality of each I/O pin is flexible and is determined entirely through the switch matrix. See Section 8.9 for details. 8.8.1 Standard I/O pad configuration Figure 8 shows the possible pin modes for standard I/O pins with analog input function: • Digital output driver with configurable open-drain output. • Digital input: Weak pull-up resistor (PMOS device) enabled/disabled. • Digital input: Weak pull-down resistor (NMOS device) enabled/disabled. • Digital input: Repeater mode enabled/disabled. • Digital input: Programmable input digital filter selectable on all pins. • Analog input: Selected through the switch matrix. Fig 8. Standard I/O pad configuration PIN VDD VDD ESD VSS ESD strong pull-up strong pull-down VDD weak pull-up weak pull-down open-drain enable output enable repeater mode enable pull-up enable pull-down enable select data inverter data output data input analog input SWM PINENABLE for analog input pin configured as digital output driver pin configured as digital input pin configured as analog input PROGRAMMABLE DIGITAL FILTER aaa-014392 |
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