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AT25QL641 bảng dữ liệu(PDF) 24 Page - Renesas Technology Corp

tên linh kiện AT25QL641
Giải thích chi tiết về linh kiện  SPI Serial Flash Memory with Dual I/O, Quad I/O, QPI Support
PDF  80 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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AT25QL641 bảng dữ liệu(HTML) 24 Page - Renesas Technology Corp

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DS-AT25QL641-130 Rev. G
Page 24
Sep 14, 2022
© 2022 Renesas Electronics
AT25QL641 Datasheet
8.5
Read Status Register-1 (05h) and Read Status Register-2 (35h)
The Read Status Register commands are used to read the Status register. They can be executed at any time
(even in the Program/Erase/Write Status Register and Write Security Register conditions). It is recommended to
check the BUSY bit before sending a new command when a Program, Erase, Write Status Register or Write
Status Register operation is in progress.
The command is entered by driving CS low and sending the command code 05h for Status Register-1 or 35h for
Status Register-2 into the SI pin on the rising edge of SCK. The status register bits are then shifted out on the SO
pin at the falling edge of SCK with most significant bit (MSB) first as shown in (Figure 8 and Figure 9). The Status
Register can be read continuously. The command is completed by driving CS high.
Figure 8. Read Status Register Command (SPI Mode)
Figure 9. Read Status Register Command (QPI Mode)
03
5
246
7
11
13
10
12
15
14
9
816
20
22
19
21
23
18
17
1
Mode 3
Mode 0
High-Impedace
SCK
CS
Command (05h or 35h)
Status Register - 1 or 2 out
Status Register - 1 or 2 out
75
63
420
7
16
5
3
0
1
2
4
MSB
*
SO
SI
IO
IO
IO
IO
SCK
Command
05h/35h
SR-1/2
out
SR-1/2
out
0
00
1
1
1
22
33
35
5
55
24
44
4
7
77
66
6
Mode 3
Mode 0
CS



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