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S32K310 bảng dữ liệu(PDF) 107 Page - NXP Semiconductors

tên linh kiện S32K310
Giải thích chi tiết về linh kiện  Supports S32K344, S32K324, S32K314, S32K312, S32K341 and S32K342. Data is preliminary for S32K311, S32K310, S32K328, S32K338, S32K348, S32K358 and S32K388
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12.5.3 Ethernet RMII
The following timing specs are defined at the device I/O pin and must be translated appropriately to arrive at timing specs/
constraints for the physical interface. Measurements are with maximum output load of 25pF, input transition of 1ns and pad
configured with DSE = 1'b1 and SRE = 1'b0. I/O operating voltage ranges from 2.97 V to 3.63 V.
Table 47. Ethernet RMII
Symbol
Description
Min
Typ
Max
Unit
Condition
Spec
Number
—
RMII input
clock frequency
(RMII_CLK)
—
—
50
MHz
—
—
RMII1,RMII5
RMII_CLK pulse
width high
35
—
65
%RMII_C
LK period
—
—
RMII2,RMII6
RMII_CLK pulse
width low
35
—
65
%RMII_C
LK period
—
—
RMII3
RXD[1:0], CRS_DV,
RXER to RMII_CLK
setup
4
—
—
ns
—
—
RMII4
RMII_CLK to
RXD[1:0], CRS_DV,
RXER hold
2
—
—
ns
—
—
RMII8
RMII_CLK to
TXD[1:0], TXEN
data valid
—
—
15
ns
—
—
RMII7
RMII_CLK to
TXD[1:0], TXEN
data invalid
2
—
—
ns
—
—
NXP Semiconductors
Communication interfaces
S32K3xx Data Sheet, Rev. 5.2, 10/2022
Data Sheet: Technical Data
Preliminary Information
107 / 137



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