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S32K310 bảng dữ liệu(PDF) 25 Page - NXP Semiconductors |
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S32K310 bảng dữ liệu(HTML) 25 Page - NXP Semiconductors |
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25 / 137 page ![]() 6.3 Power management system - S32K358, S32K348, S32K338, S32K328 SMPS Flash memory LPCMP_n FXOSC SIRC FIRC SXOSC Registers - Standby domain - Standby domain (optional) - On during FPM (Run mode) only PLLDIG0 MC_RGM WKPU MC_PCU PIT_0 (RTI) SOG (Run) SRAM 64 kB RTC DCM PLLDIG1 TempSense SOG (Standby) ADC_n LPM PMC LPM (V15) V11_STANDBY V25 V11_RUN V11_STANDBY V11_STANDBY (Triple bond) Last Mile distributed regulator FPM SW* SW* optional optional [See footnotes] VIN VC_BJT Pads GPIO VDD_HV_A VSS Pads GPIO VDD_HV_B VSS (Triple bond) [See footnotes] The V15 input voltage can be supplied directly by an SBC or Voltage regulator. The S32K3x8 devices provide two options to derive the V15 regulator from the 5V or 3.3V supply. Option 1: A DC/DC converter (SMPS) regulator can be implemented by connecting the external components (PMOS, inductor, diode) shown in the figure above, at pins VDD_DCDC, PMOS_CTRL, and VSS_DCDC. In this case, VRC_CTRL must not be connected. VDD_DCDC must be connected to the VDD_HV_A or VDD_HV_B, supply voltage. In this VRC_CTRL pin must be connected to the base of the transistor. In this case, VDD_DCDC, PMOS_CTRL must not be connected. VSS_DCDC must be connected to MCU GND. Option 2: A linear regulator can be implemented by connecting a bipolar NPN transistor from the VDD_HV_A or VDD_HV_B, supply voltage shown as VC_BJT in the figure above. The COUT_V15 In this option, COUT_V15 is specified in Recommended decoupling capacitors. option, COUT_V15 is specified in SMPS regulator electrical specifications. NXP Semiconductors Power management S32K3xx Data Sheet, Rev. 5.2, 10/2022 Data Sheet: Technical Data Preliminary Information 25 / 137 |
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