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S32K310 bảng dữ liệu(PDF) 64 Page - NXP Semiconductors |
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S32K310 bảng dữ liệu(HTML) 64 Page - NXP Semiconductors |
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64 / 137 page ![]() Table 18. Example RUN mode configuration supply currents (continued) 25, max 8 62 53 85, typ 7 60 49 85, max 8 76.4 66.3 105, typ 7 65.8 55 105, max 8 94.4 84.4 125, typ 7 78.6 64.7 125, max 8, 9, 10 120.7 110.5 S32K311 , S32K310 25, typ 7 NA NA NA 80 NA 70 NA NA NA 25, max 8 92 80 85, typ 7 TBD TBD 85, max 8 TBD TBD 105, typ 7 TBD TBD 105, max 8 TBD TBD 125, typ 7 TBD TBD 125, max 8, 9, 10 140 130 1. Current numbers are for reduced configuration and may vary based on user configuration and silicon process variation. 2. See the configurations in Table 20. 3. IO current is not included. The actual current requirements for IOs will depend on the I/O configuration in the application. 4. RUN IDD @ VDD_HV_A includes Flash memory read current from the V25 voltage rail. 5. RUN IDD @ V15 includes Flash memory read current from the V11 voltage rail. 6. For S32K388, the current from a V15 supply will flow through the external NMOS for the V11 regulation stage, and into the V11 pins of the device. 7. “typ” is indicative of the average current numbers at the nominal internally regulated V11 supply voltage, VDD_HV_A = 5.0V, VDD_HV_B = 5.0V, V15 = 1.5V, for the typical silicon process. 8. “max” is indicative of the maximum current numbers at the maximum internally regulated V11 supply voltage (1.16 V), VDD_HV_A = 5.5V, VDD_HV_B = 5.5V, V15 = 1.65V, for the fast silicon process. 9. For the maximum allowable RUN current in an application, the junction temperature must be kept below the maximum specification, TJ < 150°C, to avoid self-heating. |
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